7733 datasheet(541/940 Pages) RENESAS

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EXTERNAL ROM VERSION

7733 Group User’s Manual

20–25

20.7 Timer A

q Output level reverse function (only for RTP0)

When the polarity selection bit (bit 3 at address 6216) is set to “1,” the output level can be reversed.

In this case, when the RTP00 to RTP03 output data bits (bits 0 to 3 at address 1D16) are set to

“0,” pins RTP00 to RTP03 output “H” level; when these bits are set to “1,” these pins output “L”

level.

When the output level reverse function and “modulated” are selected, the pulse width modulation

is performed while pins RTP00 to RTP03 output “L” level. Figure 20.7.12 shows an operation

example when the output level is reversed with “modulated” selected.

Fig. 20.7.12 Operation example when RTP0 output level reverse function and “modulated” are selected

[Precautions for pulse output port mode (pulse output function)]

1. In order to make ports P50 (RTP00), P52 (RTP02), P54 (RTP10), and P56 (RTP12) function as the pulse

output pins, fix bit 2 of the timer A0 to A3 mode registers to “1.”

q When using RTP0: Fix bit 2 of the timer A0 and A1 mode registers to “1.”

q When using RTP1: Fix bit 2 of the timer A2 and A3 mode registers to “1.”

2. When the pulse width modulation function is not used, timers A1 and A3 can be used as timers which

do not have I/O pins. In this case, fix bit 2 of the timer A1 and A3 mode registers to “1.” In addition, fix

bits 0, 1, 4, and 5 of these registers to “0.”

000016

3 (00112)

6(0110 2 )

C (11002)

9 (10012)

FFFF16

n, m : Reloaded value

Pulse output is started.

RTP03 output

RTP02 output

RTP01 output

RTP00 output

Timer A1 interrupt

request bit

Count start flag

Counting is started.

Contents of pulse

output data register 0

Timer A0 interrupt

request bit

Cleared to “0” when an interrupt request is accepted;

otherwise, cleared by software.

Cleared to “0” when an interrupt request is accepted;

otherwise, cleared by software.

Note: The output level of the pulse output port is undefined from when the pulse output port mode is set until

the first timer underflow occurs. Also, this output level is at a floating state after reset because the

pulse output port becomes the input port at that time.

In the above example, in order to shorten this undefined period, the following procedure is performed:

• A small value (n) is set to the timer counter as the initial value.

• After the first underflow occurs, the normal value (m) is set to the timer counter.

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