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7733 Datasheet(PDF) 578 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 578 Page - Renesas Technology Corp |
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578 / 940 page ![]() APPENDIX 7733 Group User’s Manual 21-30 Appendix 3. Control registers Watchdog timer register b7 b0 Watchdog timer register (address 6016) Bit 7 to 0 Watchdog timer is initialized. By writing dummy data to this register, watchdog timer’s value is initialized to “FFF16” (Dummy data: 0016 to FF16). At reset Un- defined WO RW Functions Watchdog timer frequency selection flag 0 : Clock f512 1 :Clock f32 At reset Un- defined 0 RW Functions b7 b6 b5 b4 b3 b2 b1 b0 Watchdog timer frequency selection flag (address 6116) Bit 7 to 1 Not implemented. 0 Watchdog timer frequency selection flag Bit name Clocks f32, f512 : Refer to chapter “14. CLOCK GENERATING CIRCUIT.” RW — |
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