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7733 Datasheet(PDF) 702 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 702 Page - Renesas Technology Corp |
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702 / 940 page  CONNECTING EXTERNAL DEVICES 7735 Group User’s Manual 12–26 External data bus Data length 8 16 8, 16 16 (When accessed starting from even address) No wait In use State when “L” level is input to pin HOLD External data bus width Software wait ALE g HLDA HOLD CS0 to CS4 Address A 1 ! 1 1 ! 1 Hold state Sampling timing <<When “L” level is input to pin HOLD while bus is in use (1 )>> External address bus/ External data bus External address bus Clock 1 Data Floating BHE Address A Floating Address B Floating Bus is not in use. When “L” level which is input to pin HOLD is accepted, the address which was output immediately before is output again, instead of a new address. Bus is in use. g RDE, WEL, WEH Bus is in use. Fig. 12.4.3 Timing when hold state is accepted and terminated (2) 12.4 Hold function |
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