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7733 Datasheet(PDF) 110 Page - Renesas Technology Corp |
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7733 Datasheet(HTML) 110 Page - Renesas Technology Corp |
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110 / 940 page ![]() KEY INPUT INTERRUPT FUNCTION 7733 Group User’s Manual 5–7 Setting of interrupt priority level b0 INT2/Key input interrupt control register (address 7F 16) b7 0 00 Interrupt priority level selection bits One of levels 1 to 7 must be set. Interrupt request bit g In order to enable the key input interrupt, the interrupt disable flag (I) must be set to “0” and the processor interrupt priority level (IPL) must be a value smaller than the INT2/key input interrupt’s priority level. (Refer to chapter “4. INTERRUPTS.” ) b0 Selection of the key input interrupt function Selection of the key input interrupt function Pull-up selection for pins KI0 to KI3 Port function control register (address 6D 16) 0: No pull-up 1: Pull-up Port P5 pull-up selection bit b7 10 0: Port P64 is a programmable I/O port with no pull-up. 1: Port P64 is an input pin with pull-up and is used for the key input interrupt. Port P6 pull-up selection bit 1 Setting of port P5 and P6 direction registers b7 b0 Port P5 direction register (address D 16) P54 to P57 are set to the input mode. (Must be set to “0000.”) 0 0 0 0 b7 b0 Port P6 direction register (address 10 16) When setting P64 as an input pin for the key input interrupt, set this bit to “0.” 0 5.3 Initial setting example for related registers Figure 5.3.1 shows an initial setting example for registers related to the key input interrupt function. Fig. 5.3.1 Initial setting example for registers related to key input interrupt function 5.3 Initial setting example for related registers |
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