7733 datasheet(275/940 Pages) RENESAS

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A-D CONVERTER

7733 Group User’s Manual

9–10

Bit

Corresponding bit’s name

Functions

Pin AN0

Pin AN2/CTS2

Pin AN3/CLK2

Pin AN4/RxD2

Pin AN6/XCOUT

0: Input mode

1: Output mode

Pin AN5/ADTRG/TxD2

Port P7 direction register (address 11 16)

Pin AN1

At reset

When using these pins as A-D

converter’s input pins, set the

corresponding bits to “0.”

Pin AN7/XCIN

9.2.5 Port P7 direction register

Input pins of the A-D converter are multiplexed with port P7. When using these pins as A-D converter’s

input pins, set the corresponding bits of the port P7 direction register to “0” to set these ports for the input

mode. Figure 9.2.6 shows the relationship between the port P7 direction register and I/O pins of the sub-

clock oscillation circuit and peripheral functions.

Fig. 9.2.6 Relationship between port P7 direction register and I/O pins of sub-clock oscillation circuit

and peripheral functions

Analog input pins function as the port P7’s I/O pins and also function as I/O pins of the sub-clock oscillation

circuit and UART2. For pins which are forcedly set to the output mode when the function for the sub-clock

oscillation circuit or UART2 is selected, analog input is disabled. (Refer to “Table 9.2.3.”)

Table 9.2.3 Port P7’s pin which is forcedly set to output mode

9.2 Block description

P73/AN3/CLK2

_____

P75/AN5/ADTRG/TxD2

P76/AN6/XCOUT

Clock synchronous serial I/O mode is selected and an internal clock is used.

(bits 3 to 0 at address 6416 = “00012”)

Serial I/O mode is selected.

(bits 2 to 0 at address 6416 = “0012,” “1002,” “1012,” or “1102”)

Sub-clock oscillation circuit is operating by itself.

(bit 4 at address 6C16 = “1” and bit 2 at address 6F16 = “0” )

Conditions where pin is forcedly set to output mode

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