7733 datasheet(272/940 Pages) RENESAS

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A-D CONVERTER

7733 Group User’s Manual

9–7

A-D register 0 (addresses 21 16 and 2016)

A-D register 1 (addresses 23 16 and 2216)

A-D register 2 (addresses 25 16 and 2416)

A-D register 3 (addresses 27 16 and 2616)

A-D register 4 (addresses 29 16 and 2816)

A-D register 5 (addresses 2B 16 and 2A16)

A-D register 6 (addresses 2D 16 and 2C16)

A-D register 7 (addresses 2F 16 and 2E16)

Bit

“0” at reading.

The A-D conversion result is read out.

Functions

At reset

Undefined

(b15)

(b8)

qWhen resolution = 10 bits

15 to 10

9 to 0

A-D register 0 (addresses 21 16 and 2016)

A-D register 1 (addresses 23 16 and 2216)

A-D register 2 (addresses 25 16 and 2416)

A-D register 3 (addresses 27 16 and 2616)

A-D register 4 (addresses 29 16 and 2816)

A-D register 5 (addresses 2B 16 and 2A16)

A-D register 6 (addresses 2D 16 and 2C16)

A-D register 7 (addresses 2F 16 and 2E16)

Bit

“0” at reading.

The A-D conversion result is read out.

Functions

At reset

Undefined

(b15)

(b8)

qWhen resolution = 8 bits

7 to 0

15 to 8

9.2.3 A-D register i (i = 0 to 7)

Figure 9.2.4 shows the structure of A-D register i. When A-D conversion is completed, the conversion result

(in other words, the contents of the successive approximation register) is stored into this register. Each A-

D register i corresponds to an analog input pin (ANi), one for one. Table 9.2.2 lists the correspondence

of an analog input pin to A-D register i.

9.2 Block description

Fig. 9.2.4 Structure of A-D register i

Table 9.2.2 Correspondence of analog input pin and A-D register i

Analog input pin

Pin AN0

Pin AN1

Pin AN2

Pin AN3

Pin AN4

Pin AN5

Pin AN6

Pin AN7

A-D register i where conversion result is stored

A-D register 0

A-D register 1

A-D register 2

A-D register 3

A-D register 4

A-D register 5

A-D register 6

A-D register 7

7733 Datasheet(PDF) 272 Page - Renesas Technology Corp

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