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7733 Datasheet(PDF) 328 Page - Renesas Technology Corp

Part # 7733
Description  16-BIT SINGLE-CHIP MICROCOMPUTER
PDF  940 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7733 Datasheet(HTML) 328 Page - Renesas Technology Corp

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CONNECTING EXTERNAL DEVICES
7733 Group User’s Manual
12–3
g
1 in the microprocessor mode
By setting the port register and port direction
register which correspond to the port shown in
( ), the corresponding pin’s level can be fixed
in the stop or wait mode.
When external data bus is 8 bits wide (BYTE = “H”)
: External address bus, external data
bus, and bus control signals
When external data bus is 16 bits wide (BYTE = “L”)
: External address bus, external data
bus, and bus control signals
A20/D4(P24)
A21/D5(P25)
A22/D6(P26)
A23/D7(P27)
R/W(P30)
BHE(P31)
ALE(P32)
HLDA(P33)
Vss
E
XOUT
XIN
RESET
CNVSS
BYTE
HOLD
25
27
26
28
34
29
30
31
32
33
35
36
37
38
39
40
14
3
25
P83/TXD0
P82/RXD0/CLKS0
P81/CLK0
P80/CTS0/RTS0/CLKS1
VCC
AVCC
VREF
AVSS
VSS
P77/AN7/XCIN
P76/AN6/XCOUT
P75/AN5/ADTRG/TxD2
P74/AN4/RxD2
P73/AN3/CLK2
P72/AN2/CTS2
P71/AN1
6
7
8
9 1011 121314151617 1819 2021
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
80
79
78
77
76
75
74
73
72
71
69
68
67
66
65
70
43 42 41
M37733MHBXXXFP
22 23 24
A20/D4(P24)
A21/D5(P25)
A22/D6(P26)
A23/D7(P27)
R/W(P30)
BHE(P31)
ALE(P32)
HLDA(P33)
Vss
E
XOUT
XIN
RESET
CNVss
BYTE
HOLD
14
3
2
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
25
27
26
28
34
29
30
31
32
33
35
36
37
38
39
40
P83/TXD0
P82/RXD0/CLKS0
P81/CLK0
P80/CTS0/RTS0/CLKS1
VCC
AVCC
VREF
AVSS
VSS
P77/AN7/XCIN
P76/AN6/XCOUT
P75/AN5/ADTRG/TxD2
P74/AN4/RxD2
P73/AN3/CLK2
P72/AN2/CTS2
P71/AN1
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44
80
79
78
77
76
75
74
73
72
71
69
68
67
66
65
70
43 42 41
M37733MHBXXXFP
g
1 in the microprocessor mode
By setting the port register and port direction
register which correspond to the port shown in
( ), the corresponding pin’s level can be fixed
in the stop or wait mode.
Fig. 12.1.1 Pin configuration in memory expansion or microprocessor mode (Top view)
12.1 Signals required for accessing external devices



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