PCF2123 datasheet(36/54 Pages) NXP

36 / 54 page

PCF2123_1

Product data sheet

Rev. 01 — 19 November 2008

36 of 54

NXP Semiconductors

PCF2123

SPI Real time clock/calendar

9.14.1 Interface watchdog timer

During read/write operations, the time counting circuits are frozen. To prevent a situation

where the accessing device becomes locked and does not clear the interface by setting

pin CE LOW, the PCF2123 has a built in watchdog timer. Should the interface be active for

more than 1 s from the time a valid subaddress is transmitted, then the PCF2123 will

automatically clear the interface and allow the time counting circuits to continue counting.

CE must return LOW once more before a new data transfer can be executed.

Fig 25. Serial bus read example

001aaf916

address

counter

SDO

SDI

SCL

months data 11BCD

years data 06BCD

R/W

addr 07HEX

a. Correct data transfer: read or write

b. Incorrect data transfer; read or write

Fig 26. Interface watchdog timer

001aai563

valid sub-address

running

time

counters

WD timer

data

WD timer running

time counters frozen

running

data

tW(CE) < 1 s

data

001aai564

valid sub-address

running

time

counters

WD timer

data

WD timer running

data transfer fail

WD trips

time counters frozen

running

data

1 s < tW(CE) < 2 s

data

PCF2123 Datasheet(PDF) 36 Page - NXP Semiconductors

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