PCK953_5

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 05 — 9 October 2008

6 of 15

NXP Semiconductors

PCK953

20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver

11. Application information

11.1 Power supply filtering

The PCK953 is a mixed analog/digital product and as such it exhibits some sensitivities

that would not necessarily be seen on a fully digital product. Analog circuitry is naturally

susceptible to random noise, especially if this noise is seen on the power supply pins. The

isolate the high switching noise digital outputs from the relatively sensitive internal analog

phase-locked loop. In a controlled environment such as an evaluation board, this level of

isolation is sufficient. However, in a digital system environment where it is more difficult to

minimize noise on the power supplies, a second level of isolation may be required. The

Figure 3 illustrates a typical power supply filter scheme. The PCK953 is most susceptible

to noise with spectral content in the 1 kHz to 1 MHz range. Therefore, the filter should be

designed to target this range. The key parameter that needs to be met in the final filter

shown in Figure 3 must have a resistance of 10

Ω to 15 Ω to meet the voltage drop

criteria. The RC filter pictured will provide a broadband filter with approximately 100 : 1

attenuation for noise whose spectral content is above 20 kHz. As the noise frequency

crosses the series resonant point of an individual capacitor, its overall impedance begins

to look inductive, and thus increases with increasing frequency. The parallel capacitor

combination shown ensures that a low impedance path to ground exists for frequencies

well above the bandwidth of the PLL. It is recommended that the user start with an 8

Ω to

10

Ω resistor to avoid potential V

resistors when a higher level of attenuation is shown to be needed.

Although the PCK953 has several design features to minimize the susceptibility to power

supply noise (isolated power and grounds and fully differential PLL) there still may be

applications in which overall performance is being degraded due to system power supply

noise. The power supply filter schemes discussed in this section should be adequate to

eliminate power supply noise related problems in most designs.

Fig 3.

Power supply filter

002aae139

3.3 V

22

µF

Rs = 5 Ω to 15 Ω

0.01

µF

0.01

µF

PCK953