PCK953_5

© NXP B.V. 2008. All rights reserved.

Product data sheet

Rev. 05 — 9 October 2008

7 of 15

NXP Semiconductors

PCK953

20 MHz to 125 MHz PECL input, 9 CMOS output, 3.3 V PLL clock driver

11.2 Driving transmission lines

The PCK953 clock driver was designed to drive high speed signals in a terminated

transmission line environment. To provide the optimum flexibility to the user, the output

drivers were designed to exhibit the lowest impedance possible. With an output

impedance of less than 20

Ω, the drivers can drive either parallel or series terminated

transmission lines.

In most high performance clock networks, point-to-point distribution of signals is the

method of choice. In a point-to-point scheme either series terminated or parallel

terminated transmission lines can be used. The parallel technique terminates the signal at

the end of the line with a 50

Ω resistance to 0.5V

level of DC current, and thus only a single terminated line can be driven by each output of

the PCK953 clock driver. For the series terminated case, however, there is no DC current

draw, thus the outputs can drive multiple series terminated lines. Figure 4 illustrates an

output driving a single series terminated line versus two series terminated lines in parallel.

When taken to its extreme, the fan-out of the PCK953 clock driver is effectively doubled

due to its capability to drive multiple lines.

The waveform plots of Figure 5 show the simulation results of an output driving a single

line versus two lines. In both cases, the drive capability of the PCK953 output buffers is

more than sufficient to drive 50

Ω transmission lines on the incident edge. Note from the

delay measurements in the simulations, a delta of only 43 ps exists between the two

differently loaded outputs. This suggests that the dual line driving need not be used

exclusively to maintain the tight output-to-output skew of the PCK953. The output

waveform in Figure 5 shows a step in the waveform; this step is caused by the impedance

mismatch seen looking into the driver. The parallel combination of the 43

Ω series resistor

plus the output impedance does not match the parallel combination of the line

impedances. The voltage wave launched down the two lines will equal:

(1)

Fig 4.

Single versus dual transmission lines

Zo = 50 Ω

002aae140

Rs = 36 Ω

Zo = 50 Ω

Rs = 36 Ω

PCK953

OUTPUT BUFFER

OutB1

OutB0

14

Ω

Zo = 50 Ω

Rs = 36 Ω

PCK953

OUTPUT BUFFER

OutA

14

Ω

IN

IN

Ro

Ro

V

L

V

S

Z

o

R

s

R

o

Z

o

++

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