3-69

TELCOM SEMICONDUCTOR, INC.

7

6

5

4

3

1

2

8

+

–

+ IN

IN

REF

ANALOG

COM

– IN

SWI

SWR

SWZ

SWI

SW1

SWZ

SWIZ

SWZ

INTEGRATOR

SWITCH CLOSED

SWITCH OPEN

SW RI

+

SWRI

–

COMPARATOR

TO

DIGITAL

SECTION

SW RI

+

SWRI

–

ANALOG

INPUT BUFFER

RINT

CINT

CREF

CSZ

Figure 3E. Integrator Output Zero Phase

GENERAL THEORY OF OPERATION

(All Pin Designations Refer to 28-Pin DIP)

Dual-Slope Conversion Principles

The TC835 is a dual-slope, integrating analog-to-digital

converter. An understanding of the dual-slope conversion

technique will aid in following the detailed TC835 opera-

tional theory.

The conventional dual-slope converter measurement

cycle has two distinct phases:

(1) Input signal integration

(2) Reference voltage integration (deintegration)

The input signal being converted is integrated for a fixed

time period. Time is measured by counting clock pulses. An

opposite polarity constant reference voltage is then inte-

grated until the integrator output voltage returns to zero. The

reference integration time is directly proportional to the input

signal.

In a simple dual-slope converter, a complete conversion

requires the integrator output to "ramp-up" and "ramp-

down."

A simple mathematical equation relates the input signal,

reference voltage, and integration time:

The dual-slope converter accuracy is unrelated to the

integrating resistor and capacitor values, as long as they are

stable during a measurement cycle. An inherent benefit is

noise immunity. Noise spikes are integrated, or averaged, to

zero during the integration periods. Integrating ADCs are

immune to the large conversion errors that plague succes-

sive approximation converters in high-noise environments.

(See Figure 4.)

TC835 Operational Theory

The TC835 incorporates a system zero phase and

integrator output voltage zero phase to the normal two-

phase dual-slope measurement cycle. Reduced system

errors, fewer calibration steps, and a shorter overrange

recovery time result.

The TC835 measurement cycle contains four phases:

(1) System zero

(2) Analog input signal integration

(3) Reference voltage integration

(4) Integrator output zero

Internal analog gate status for each phase is shown in

Table 1.

REF

VOLTAGE

ANALOG

INPUT

SIGNAL

DISPLAY

SWITCH

DRIVER

CONTROL

LOGIC

CLOCK

COUNTER

POLARITY CONTROL

PHASE

CONTROL

VIN

VIN

VFULL SCALE

1/2 VFULL SCALE

VARIABLE

REFERENCE

INTEGRATE

TIME

FIXED

SIGNAL

INTEGRATE

TIME

INTEGRATOR

COMPARATOR

Figure 4. Basic Dual-Slope Converter

where:

0

1

RC

RC

.

]

TC835

PERSONAL COMPUTER

DATA ACQUISITION A/D CONVERTER