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LT3782AIUFD Datasheet(PDF) 9 Page - Linear Technology |
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LT3782AIUFD Datasheet(HTML) 9 Page - Linear Technology |
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9 / 20 page ![]() LT3782A 9 3782af With a 200ns one-shot timer on chip, the LT3782A provides flexibility on the external sync pulse width. The sync pulse threshold is about 1.2V (Figure 1). This pin can be floated when the sync function is not used. Current Limit Current limit is set by the 63mV threshold across SEN1P, SEN1N for channel one and SEN2P, SEN2N for channel two. By connecting an external resistor RS (see Block Diagram), the current limit is set for 63mV/RS. RS should be placed very close to the power switch with very short traces. A low pass RC filter is needed across RS to filter out the switching spikes. Good Kelvin sensing is required for accurate current limit. The input bypass capacitor ground should be at the same ground point of the current sense resistor to minimize the ground current path. Synchronous Rectifier Switches For high output voltage applications, the power loss of the catch diodes are relatively small because of high duty cycle. If diodes power loss or heat is a concern, the LT3782A provides PWM signals through SGATE1 and SGATE2 pins to drive external MOSFET drivers for synchronous recti- fier operation. Note that SGATE drives the top switch and BGATE drives the bottom switch. To avoid cross conduction between top and bottom switches, the BGATE turn-on is delayed 100ns (when DELAY pin is tied to RSET pin) from SGATE turn-off (see Figure 2). If a longer delay is needed to compensate for the propagation delay of external gate driver, a resistor divider can be used from RSET to ground to program VDELAY for the longer delay needed. For example, for a switching frequency of 250kHz and delay of 150ns, Figure 1. Synchronizing with External Clock Figure 2. Delay Timing 5V TO 20V VN2222 PULSE WIDTH > 200ns 5k SYNC 3782A F01 LT3782A 3782A F02 DELAY BGATE1 SGATE1 SET APPLICATIONS INFORMATION |
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