BQ2011 datasheet(2/20 Pages) TI

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Pin Descriptions

MODE

Display mode output

When left floating, this output selects rela-

tive mode for capacity display. If connected

to the anode of the LEDs to source current,

absolute mode is selected for capacity dis-

play. See Table 1.

SEG1–

SEG5

LED display segment outputs

Each output may activate an LED to sink

the current sourced from MODE, the bat-

tery, or VCC.

PFC

Programmed full count selection input

This three-level input pin defines the pro-

grammed full count (PFC) thresholds and

scale selections described in Table 1.

The

state of the PFC pin is only read immediate-

ly after a reset condition.

Sense resistor input

The voltage drop (VSR) across the sense re-

sistor RS is monitored and integrated over

time to interpret charge and discharge activ-

ity. The SR input is tied to the low side of

the sense resistor. VSR >VSS indicates dis-

charge, and VSR <VSS indicates charge. The

effective voltage drop, VSRO, as seen by the

bq2011 is VSR +VOS (see Table 3).

No connect

DISP

Display control input

DISP floating allows the LED display to

be active during charge and discharge if

VSRO < -1mV (charge) or VSRO > 2mV (dis-

charge).

Transitioning DISP low activates

the display for 4

± 0.5 seconds.

Secondary battery input

This input monitors the single-cell voltage

potential through a high-impedance resis-

tive divider network for the end-of-discharge

voltage (EDV) threshold and maximum cell

voltage (MCV).

RBI

This input is used to provide backup potential

to the bq2011 registers during periods when

VCC

≤ 3V. A storage capacitor should be con-

nected to RBI.

Serial I/O pin

This is an open-drain bidirectional pin.

REF

Voltage reference output for regulator

REF provides a voltage reference output for

an optional micro-regulator.

VCC

Supply voltage input

VSS

Ground

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