BQ2011 datasheet(4/20 Pages) TI

4 / 20 page

The bq2011 RBI input pin is intended to be used with a

storage capacitor to provide backup potential to the inter-

nal bq2011 registers when VCC momentarily drops below

3.0V. VCC is output on RBI when VCC is above 3.0V.

After VCC rises above 3.0V, the bq2011 checks the inter-

nal registers for data loss or corruption.

If data has

changed, then the NAC and FULCNT registers are

cleared, and the LMD register is loaded with the initial

PFC.

Voltage Thresholds

In conjunction with monitoring VSR for charge/discharge

currents, the bq2011 monitors the single-cell battery po-

tential through the SB pin. The single-cell voltage po-

tential is determined through a resistor-divider network

per the following equation:

=−

where N is the number of cells, RB1 is connected to the

positive battery terminal, and RB2 is connected to the

negative battery terminal. The single-cell battery volt-

age is monitored for the end-of-discharge voltage (EDV)

and for maximum cell voltage (MCV). The EDV thresh-

old level is used to determine when the battery has

reached an “empty” state, and the MCV threshold is used

for fault detection during charging. The EDV and MCV

thresholds for the bq2011 are fixed at:

VEDV = 0.90V

VMCV = 2.00V

During discharge and charge, the bq2011 monitors VSR

for various thresholds, VSR1–VSR4. These thresholds are

used to compensate the charge and discharge rates. Ref-

er to the discharge compensation section for details.

EDV monitoring is disabled if VSR > VSR1 (50mV typical)

and resumes 1 second after VSR drops back below VSR1.

Reset

The bq2011 recognizes a valid battery whenever VSB is

greater than 0.1V typical. VSB rising from below 0.25V

resets the device. Reset can also be accomplished with a

command over the serial port as described in the Reset

Temperature

The bq2011 internally determines the temperature in

10°C steps centered from -35°C to +85°C. The tempera-

ture steps are used to adapt charge and discharge rate

compensations, self-discharge counting, and available

charge display translation.

The temperature range is

available over the serial port in 10°C increments as

shown below:

Layout Considerations

The bq2011 measures the voltage differential between

the SR and VSS pins. VOS (the offset voltage at the SR

pin) is greatly affected by PC board layout. For optimal

results, the PC board layout should follow the strict rule

of a single-point ground return. Sharing high-current

ground with small signal ground causes undesirable

noise on the small signal nodes. Additionally:

The capacitors (SB and VCC) should be placed as close

as possible to the SB and VCC pins, respectively, and

their paths to VSS should be as short as possible. A

high-quality ceramic capacitor of 0.1

µf is recommended

for VCC.

The sense resistor (RS) should be as close as possible

to the bq2011.

The R-C on the SR pin should be located as close as

possible to the SR pin. The maximum R should not

exceed 20K.

bq2011

TMPGG (hex)

Temperature Range

< -30°C

-30°C to -20°C

-20°C to -10°C

-10°C to 0°C

0°C to 10°C

10°C to 20°C

20°C to 30°C

30°C to 40°C

40°C to 50°C

50°C to 60°C

60°C to 70°C

70°C to 80°C

> 80°C

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