PCI1420 datasheet(6/137 Pages) TI

6 / 137 page

5.16

ExCA Memory Windows 0–4 End-Address High-Byte

Registers (Index 13h, 1Bh, 23h, 2Bh, 33h)

5–18

. . . . . . . . . . . . . . . . . . . . .

5.17

ExCA Memory Windows 0–4 Offset-Address Low-Byte

Registers (Index 14h, 1Ch, 24h, 2Ch, 34h)

5–19

. . . . . . . . . . . . . . . . . . . . .

5.18

ExCA Memory Windows 0–4 Offset-Address High-Byte

Registers (Index 15h, 1Dh, 25h, 2Dh, 35h)

5–20

. . . . . . . . . . . . . . . . . . . . .

5.19

ExCA I/O Windows 0 and 1 Offset-Address Low-Byte

Registers (Index 36h, 38h)

5–21

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.20

ExCA I/O Windows 0 and 1 Offset-Address High-Byte

Registers (Index 37h, 39h)

5–21

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.21

ExCA Card Detect and General Control Register (Index 16h)

5–22

. . . . . .

5.22

ExCA Global Control Register (Index 1Eh)

5–23

. . . . . . . . . . . . . . . . . . . . . .

5.23

ExCA Memory Windows 0–4 Page Register

5–24

. . . . . . . . . . . . . . . . . . . .

CardBus Socket Registers (Functions 0 and 1)

6–1

. . . . . . . . . . . . . . . . . . . . . .

6.1

Socket Event Register

6–2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.2

Socket Mask Register

6–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.3

Socket Present State Register

6–4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.4

Socket Force Event Register

6–6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.5

Socket Control Register

6–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6.6

Socket Power Management Register

6–8

. . . . . . . . . . . . . . . . . . . . . . . . . . .

Distributed DMA (DDMA) Registers

7–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.1

DMA Current Address/Base Address Register

7–1

. . . . . . . . . . . . . . . . . . .

7.2

DMA Page Register

7–2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.3

DMA Current Count/Base Count Register

7–2

. . . . . . . . . . . . . . . . . . . . . . .

7.4

DMA Command Register

7–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.5

DMA Status Register

7–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.6

DMA Request Register

7–4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.7

DMA Mode Register

7–4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.8

DMA Master Clear Register

7–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7.9

DMA Multichannel/Mask Register

7–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electrical Characteristics

8–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8.1

Absolute Maximum Ratings Over Operating

Temperature Ranges

8–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8.2

Recommended Operating Conditions

8–2

. . . . . . . . . . . . . . . . . . . . . . . . . .

8.3

Electrical Characteristics Over Recommended

Operating Conditions

8–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

8.4

PCI Clock/Reset Timing Requirements Over Recommended

Ranges Of Supply Voltage And Operating Free-air Temperature

8–3

. . .

8.5

PCI Timing Requirements Over Recommended Ranges

of Supply Voltage and Operating Free-air Temperature

8–4

. . . . . . . . . . .

Mechanical Information

9–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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