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PCI4450 Datasheet(PDF) 27 Page - Texas Instruments |
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PCI4450 Datasheet(HTML) 27 Page - Texas Instruments |
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27 / 197 page  PCI4450 GFN/GJG PC Card and OHCI Controller SCPS046 – JANUARY 1999 27 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 serial ROM implementation A serial ROM interface exists in both the Open HCI function and the PC Card controller functions. The PCI4450 implementation adds a busy indication between the interfaces to allow the function 2 loading to follow the functions 0 and 1 load. All serial ROM addressing uses slave address 8’hA0. The functions 0 and 1 serial EEPROM state machine is modified to provide a busy indication to function 2 and to start loading registers at word address 8’h20 to allow for some serial ROM format flexibility in function 2. Primarily, the serial ROM is used to preload the PCI4450 registers with data, and only write accessible bits in these registers may be preloaded. Figure 8 illustrates the PCI4450 serial ROM data format, which is an expanded version of both the OHCI-Lynx and PCI1450 serial ROM formats. Slave Address 8’b10100000 Flag byte Word address 32 (20h) SubSys byte 3 Word address 33 MaxLat / MinGnt Word address 0 SubSys byte 2 Word address 34 SubSys byte 0 Word address 1 SubSys byte 1 Word address 35 SubSys byte 1 Word address 2 SubSys byte 0 Word address 36 SubSys byte 2 Word address 3 SysCtrl byte 0 Word address 37 SubSys byte 3 Word address 4 SysCtrl byte 1 Word address 38 Link_Enh byte 0 Word address 5 SysCtrl byte 2 Word address 39 MiniROM_Addr Word address 6 SysCtrl byte 3 Word address 40 GUIDHi byte 0 Word address 7 General control Word address 41 GUIDHi byte 1 Word address 8 GP event enable Word address 42 GUIDHi byte 2 Word address 9 GP output Word address 43 GUIDHi byte 3 Word address 10 MF route byte 0 Word address 44 GUIDLo byte 0 Word address 11 MF route byte 1 Word address 45 GUIDLo byte 1 Word address 12 MF route byte 2 Word address 46 GUIDLo byte 2 Word address 13 MF route byte 3 Word address 47 GUIDLo byte 3 Word address 14 Card Control Word address 48 CheckSum Word address 15 Device control Word address 49 Link_Enh byte 1 Word address 16 Diagnostic Word address 50 PCI misc byte 0 Word address 17 PMC byte 1 Word address 51 PCI misc byte 1 Word address 18 ExCA ID and rev Word address 52 RSVD ... AVAIL Figure 8. Serial ROM Data Format The flag byte at word address 32 indicates to the PCI4450 whether or not the PC Card controller functions loads the data from word address range 33–52. A flag byte set to 8’hFF indicates to stop loading the serial ROM data for functions 0 and 1, but is independent of the function 2 1394 Open HCI controller load from word address range 0–18. An additional change in the serial ROM behavior with respect to Open HCI GUIDROM register access is the MiniROM_Addr. The MiniROM_Addr field in the ROM data is loaded from byte location 6 (EEPROM word address 6) and indicates to function 2 where to begin accessing the serial ROM via the GUID ROM register. The GUIDROM.addrReset bit function changes slightly to reset serial ROM access to the byte location indicated by MiniROM_Addr. A MiniROM_Addr value of zero provides identical operation as the OHCI-Lynx. |
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