SM320C6201GLE datasheet(22/73 Pages) TI

22 / 73 page

SM320C6201, SMJ320C6201B

DIGITAL SIGNAL PROCESSORS

SGUS028A – NOVEMBER 1998 – REVISED JANUARY 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

clock PLL (continued)

Table 1. SM320C6201 PLL Component Selection Table†

CYCLE

TIME (ns)

CLKMODE

CLKIN

(MHz)

CLKOUT1

(MHz)

(

Ω)

(

µF)

(pF)

EMI FILTER

PART NO.‡

TYPICAL

LOCK TIME

(

µs)§

200

16.9

0.15

2 700

TDK #153

5.5

45.5

181.8

13.7

0.18

3 900

TDK #153

41.6

166.7

17.4

0.15

3 300

TDK #153

6.5

38.5

153.8

16.2

0.18

3 900

TDK #153

35.7

142.9

0.22

3 900

TDK #153

7.5

33.3

133.3

16.2

0.22

3 900

TDK #153

31.3

125

0.27

4 700

TDK #153

8.5

29.4

117.7

11.8

0.33

6 800

TDK #153

27.7

111.1

0.39

6 800

TDK #153

9.5

26.3

105.3

10.5

0.39

8 200

TDK #153

100

0.47

8 200

TDK #153

† For CLKMODE x1, the PLL is bypassed and all six external PLL components can be removed. For this case, the PLLV terminal has to be

connected to a clean supply and the PLLG and PLLF terminals should be tied together.

‡ Full EMI filter part number : ACF 451832-153-T

§ Under some operating conditions, the maximum PLL lock time may vary as much as 150% from the specified typical value. For example, if the

typical lock time is specified as 100

µs, the maximum value may be as long as 250 µs.

Table 2. SM320C6201B PLL Component Selection Table†

CLKMODE

(

Ω)

(nF)

(pF)

EMI FILTER

PART NO.‡

TYPICAL

LOCK TIME (

µs)§

60.4

560

TDK #153

† For CLKMODE x1, the PLL is bypassed and all six external PLL components can be removed. For this case, the PLLV terminal has to be

connected to a clean supply and the PLLG and PLLF terminals should be tied together.

‡ Full EMI filter part number : ACF 451832-153-T

§ Under some operating conditions, the maximum PLL lock time may vary as much as 150% from the specified typical value. For example, if the

typical lock time is specified as 100

µs, the maximum value may be as long as 250 µs.

power supply sequencing

For the ’C6201 device, the 2.5-V supply powers the core and the 3.3-V supply powers the I/O buffers. For the

’C6201B device, the 1.8-V supply powers the core and the 3.3-V supply powers the I/O buffers. The core supply

should be powered up first, or at the same time as the I/O buffers. This is to ensure that the I/O buffers have

valid inputs from the core before the output buffers are powered up, thus preventing bus contention with other

chips on the board.

SM320C6201GLE Datasheet(PDF) 22 Page - Texas Instruments

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