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MCP40D18 Datasheet(PDF) 40 Page - Microchip Technology

Part # MCP40D18
Description  7-Bit Single I2C??(with Command Code) Digital POT with Volatile Memory in SC70
PDF  66 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP40D18 Datasheet(HTML) 40 Page - Microchip Technology

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MCP40D17/18/19
DS22152B-page 40
© 2009 Microchip Technology Inc.
FIGURE 5-15:
I2C Read Command Format (Slave Address = “0101110”).
FIGURE 5-16:
I2C Read Communication Behavior (Slave Address = “0101110”).
STOP bit
Slave Address Byte
Command Code
1
01
0
S1
1
0
0
0
A0
0
0 A
Slave Address Byte
Data Byte
AD3
0 D6 D5D4
D2D1 D0 A(2) P
Read/Write bit (“0” = Write)
00
0
0
11
0
1
01
0
1
S = Start Condition
P = Stop Condition
A = Acknowledge
X = Don’t Care
R/W = Read/Write bit
D6:D0 = Data bits
Legend
S
Read/Write bit (“1” = Read)
Note 1: Master Device is responsible for ACK / NACK signal. If a NACK signal occurs, the MCP40D17/18/19 will
abort this transfer and release the bus.
2: The Master Device will Not ACK, and the MCP40D17/18/19 will release the bus so the Master Device can
generate a Stop or Repeated Start condition.
Read 1 Byte with Command Code = 00h
Read 2 Byte with Command Code = 00h
S Slave Address
R
/
W
A
C
K Command Code
A
C
K
R
S Slave Address
R
/
W
A
C
K
Master
S 0 1 011 100 10 000 000 01S 0 101 1 1 011
MCP40D17/18/19
0
0
0
I2C Bus
S 01 011 100 00 000 000 00S 0 101 1 1 010
Data Byte
A
C
KP
Master
1 P
MCP40D17/18/19
0 d d d d d d d 1
I2C Bus
0 ddd ddd d1P
S Slave Address
R
/
W
A
C
K Command Code
A
C
K
R
S Slave Address
R
/
W
A
C
K
Master
S 0 1 011 100 10 000 000 01S 0 101 1 1 011
MCP40D17/18/19
0
0
0
I2C Bus
S 01 011 100 00 000 000 00S 0 101 1 1 010
Data Byte
A
C
K Data Byte
A
C
KP
Master
0
1 P
MCP40D17/18/19
0 d dd ddd d10 d d dd dd d1
I2C Bus
0 ddd ddd d00 d d dd dd d1P



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