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MCP40D18 Datasheet(PDF) 51 Page - Microchip Technology

Part # MCP40D18
Description  7-Bit Single I2C??(with Command Code) Digital POT with Volatile Memory in SC70
PDF  66 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP40D18 Datasheet(HTML) 51 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
DS22152B-page 51
MCP40D17/18/19
8.3
Temperature Sensor Applications
Thermistors
are
resistors
with
very
predictable
variation with temperature. Thermistors are a popular
sensor choice when a low-cost temperature-sensing
solution is desired. Unfortunately, thermistors have
non-linear characteristics that are undesirable, typically
requiring trimming in an application to achieve greater
accuracy. There are several common solutions to trim
and linearize thermistors. Figure 8-5 and Figure 8-6
are simple methods for linearizing a 3-terminal NTC
thermistor. Both are simple voltage dividers using a
Positive Temperature Coefficient (PTC) resistor (R1)
with a transfer function capable of compensating for the
linearity error in the Negative Temperature Coefficient
(NTC) thermistor.
The circuit, illustrated by Figure 8-5, utilizes a digital
rheostat for trimming the offset error caused by the
thermistor’s part-to-part variation. This solution puts the
digital potentiometer’s RW into the voltage divider
calculation. The MCP40D17/18/19’s RAB temperature
coefficient is a low 50 ppm (-20°C to +70°C). RW’s error
is substantially greater than RAB’s error because RW
varies with VDD, wiper setting and temperature. For the
50 k
Ω devices, the error introduced by R
W is, in most
cases, insignificant as long as the wiper setting is > 6.
For the 2 k
Ω devices, the error introduced by R
W is
significant because it is a higher percentage of RWB.
For these reasons, the circuit illustrated in Figure 8-5 is
not the most optimum method for “exciting” and
linearizing a thermistor.
FIGURE 8-5:
Thermistor Calibration using
a Digital Potentiometer in a Rheostat
Configuration.
The circuit illustrated by Figure 8-6 utilizes a digital
potentiometer for trimming the offset error. This
solution removes RW from the trimming equation along
with the error associated with RW. R2 is not required,
but can be utilized to reduce the trimming “window” and
reduce variation due to the digital pot’s RAB part-to-part
variability.
FIGURE 8-6:
Thermistor Calibration using
a Digital Potentiometer in a Potentiometer
Configuration.
NTC
VDD
VOUT
Thermistor
R1
R2
MCP40D17
NTC
VDD
VOUT
Thermistor
R1
MCP40D18



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