LTC3855 datasheet(32/44 Pages) LINER

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LTC3855

3855f

This occurs around 50% duty cycle on either channel due

to the phasing of the internal clocks and may cause minor

duty cycle jitter.

Reduce VIN from its nominal level to verify operation

of the regulator in dropout. Check the operation of the

undervoltage lockout circuit by further lowering VIN while

monitoring the outputs to verify operation.

Investigate whether any problems exist only at higher out-

put currents or only at higher input voltages. If problems

coincide with high input voltages and low output currents,

look for capacitive coupling between the BOOST, SW, TG,

and possibly BG connections and the sensitive voltage

and current pins. The capacitor placed across the current

sensing pins needs to be placed immediately adjacent to

the pins of the IC. This capacitor helps to minimize the

effects of differential noise injection due to high frequency

capacitive coupling. If problems are encountered with

high current output loading at lower input voltages, look

for inductive coupling between CIN, Schottky and the top

MOSFET components to the sensitive current and voltage

sensing traces. In addition, investigate common ground

path voltage pickup between these components and the

SGND pin of the IC.

Design Example

As a design example for a two channel high current regula-

tor, assume VIN = 12V(nominal), VIN = 20V(maximum),

VOUT1 = 1.8V, VOUT2 = 1.2V, IMAX1,2 = 15A, and f = 400kHz

(see Figure 16).

The regulated output voltages are determined by:

VOUT = 0.6V • 1+









Using 20k 1% resistors from both VFB nodes to ground,

the top feedback resistors are (to the nearest 1% standard

value) 40.2k and 20k.

The frequency is set by biasing the FREQ pin to 1V (see

Figure 12).

The inductance values are based on a 35% maximum

ripple current assumption (5.25A for each channel). The

highest value of ripple current occurs at the maximum

input voltage:

OUT

L MAX

OUT

IN MAX

−













f • ( )

(

)

∆

Channel 1 will require 0.78µH, and channel 2 will require

0.54µH. The Vishay IHLP4040DZ-01, 0.56µH inductor is

chosen for both rails. At the nominal input voltage (12V),

the ripple current will be:

∆I

L NOM

OUT

IN NOM

(

)

(

)

•

−













Channel 1 will have 6.8A (46%) ripple, and channel 2 will

have 4.8A (32%) ripple. The peak inductor current will be

the maximum DC value plus one-half the ripple current,

or 18.4A for channel 1 and 17.4A for channel 2.

Theminimumon-timeoccursonchannel2atthemaximum

VIN, and should not be less than 90ns:

tON(MIN) =

VOUT

VIN(MAX) f

1.2V

20V(400kHz)

= 150ns

With ILIM floating, the equivalent RSENSE resistor value

can be calculated by using the minimum value for the

maximum current sense threshold (45mV).

RSENSE(EQUIV) =

VSENSE(MIN)

ILOAD(MAX) +

∆IL(NOM)

The equivalent required RSENSE value is 2.4mΩ for chan-

nel 1 and 2.6mΩ for channel 2. The DCR of the 0.56µH

inductor is 1.7mΩ typical and 1.8mΩ maximum for a

25°C ambient. At 100°C, the estimated maximum DCR

value is 2.3mΩ. The maximum DCR value is just slightly

under the equivalent RSENSE values. Therefore, R2 is not

required to divide down the signal.

For each channel, 0.1µF is selected for C1.

(DCRMAX at 25°C)•C1

0.56

µH

1.8m

Ω • 0.1µF

= 3.11k

Choose R1 = 3.09k

applicaTions inForMaTion

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