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CAP1006 Datasheet(PDF) 29 Page - SMSC Corporation

Part # CAP1006
Description  5 and 6 Channel Capacitive Touch Sensor
PDF  53 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

CAP1006 Datasheet(HTML) 29 Page - SMSC Corporation

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5 and 6 Channel Capacitive Touch Sensor
Datasheet
SMSC CAP1005 / CAP1006
29
Revision 1.1 (08-05-09)
DATASHEET
During Power-On-Reset (POR), the default values are stored in the registers. A POR is initiated when
power is first applied to the part and the voltage on the VDD supply surpasses the POR level as
specified in the electrical characteristics. Any reads to undefined registers will return 00h. Writes to
undefined registers will not have an effect.
5.1
Main Status Control Register
The Main Status and Control register controls the primary power state of the device.
Bit 5 - STBY - Enables Standby.
‘0’ (default) - Sensor scanning is active.
‘1’ - Capacitive Touch Sensor scanning is limited to the sensors set in the Standby Channel register
(see Section 5.18). The status registers will not be cleared until read. Sensors that are no longer
sampled will flag a release and then remain in a non-touched state.
Bit 4 - DSLEEP - Enables Deep Sleep by deactivating all functions. This bit will be cleared when SPI
or SMBus are received targeting the CAP1005 / CAP1006. If the CAP1005 / CAP1006 is configured
to communicate using the BC-Link protocol, then this bit is ignored.
‘0’ (default) - Sensor scanning is active.
‘1’ - All sensor scanning is disabled. The status registers are automatically cleared and the INT bit
is cleared.
Bit 0 - INT - Indicates that there is an interrupt. This bit is only set if the ALERT# pin has been asserted.
If a channel detects a touch and its associated interrupt enable bit is not set to a logic ‘1’ then no
action is taken.
This bit is cleared by writing a logic ‘0’ to it. When this bit is cleared, the ALERT# pin will be deasserted
and all status registers will be cleared if the condition has been removed. If the WAKE/SPI_MOSI pin
is asserted as a result of a touch detected while in Standby, it will likewise be deasserted when this
bit is cleared.
Note that this pin is not driven when communicating via the 4-wire SPI protocol
‘0’ - No interrupt pending.
FDh
R
Product ID
CAP1006
Stores a fixed value that identifies
each product
44h
Page 46
Product ID
CAP1005
Stores a fixed value that identifies
each product
45h
FEh
R
Manufacturer ID
Stores a fixed value that identifies
SMSC
5Dh
Page 47
FFh
R
Revision
Stores a fixed value that represents
the revision number
81h
Page 47
Table 5.2 Main Status Control Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
00h
R/W
Main Status
Control
-
-
STBY
DSLEEP
-
-
-
INT
00h
Table 5.1 Register Set in Hexadecimal Order (continued)
REGISTER
ADDRESS
R/W
REGISTER NAME
FUNCTION
DEFAULT
VALUE
PAGE



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