ST7586S datasheet(18/63 Pages) SITRONIX

18 / 63 page

ST7586S

Ver-1.1a

18/63

2009/11/30

Display Data RAM (DDRAM)

ST7586S containing a 384x160x2 bit static RAM stores the display data. The display data RAM (DDRAM) stores the pixel

data of the LCD. The built-in DDRAM is an addressable memory array with 384 columns by 160 rows. ST7586S provides two

kinds of display modes (monochrome mode and 4-level gray scale mode) and a fast-addressing mode for fast updating

display data. Each column address represents 3 sub-columns. For example, setting the column address to “01h” means that

upcoming 8 bits data is addressing to column 3; column 4 and column 5 respectively (refer to Fig. 3 and Fig. 4). The display

data which is written by MCU will be stored in DDRAM with the format of D7 at the left and D0 at the right when MX=0 (refer

to Fig. 3 and Fig. 4). The row address is directly related to the row output number. The LCD controller reads the pixel data in

DDRAM, and then it outputs to COM/SEG pad. While the LCD controller operates independently, display data can be written

into DDRAM at the same time and data is also being displayed on LCD panel without causing the abnormal display.

1 1 1 0 0 1 0 0 1 1 1 0 0 1

0 1 0 0 1 1 1 0 0 0 0 1 0 1

1 1 1 0 0 1

0 0 0 0 1 0

1 1 1

1 1 0 0

0 0 0 0 0 1 1

0 1 0 0 1 1 1 0 0 0 0 1 0 1

1 1 1 0 0 1

1 0 0 0 0 1

0 1 1 1 0 0 1 1 0 0 0 1 0 1

1 1 1 0 0 1 1

1 1 1 0 0 1

1 0

0 0

1 0 0 0 0 1

0 0 0 1 0 1

1 1 1 0 0 1

0 1 1 1 0 0

0 0 1

1 0 0 1 1 0

1 0 0 1 1 1

1 1 1 1 0 0 0 1

D7 D6 D5 D4 D3 D2 D1 D0

SEG

(3 Bits)

SEG

3N+1

(3 Bits)

SEG

3N+2

(2 Bits)

SEG

(3 Bits)

SEG

3N+1

(3 Bits)

SEG

3N+2

(2 Bits)

0 0 0 1 0 0 1 1

D7 D6 D5 D4 D3 D2 D1 D0

Display Data RAM

Liquid Crystal Display

Fix LSB to 0 if Gray Mode

2 Bits Data

DDRAM

LCD

3 Bits Data

(D4)

(D3)

(D2)

DDRAM

LCD

Fig. 3

DDRAM Mapping (4-Level Gray Scale Mode)

ST7586S Datasheet(PDF) 18 Page - Sitronix Technology Co., Ltd.

ST7586S Datasheet(HTML) 18 Page - Sitronix Technology Co., Ltd.

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