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SE97 Datasheet(PDF) 32 Page - NXP Semiconductors |
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SE97 Datasheet(HTML) 32 Page - NXP Semiconductors |
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32 / 55 page ![]() SE97_7 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 07 — 29 January 2010 32 of 55 NXP Semiconductors SE97 DDR memory module temp sensor with integrated SPD, 3.3 V 8.6 Temperature register (16-bit read-only) Table 21. Temperature register bit allocation Bit 15 14 13 12 11 10 9 8 Symbol ACT AAW BAW SIGN TEMP Default 00 00 00 00 Access RR RR RR RR Bit 7 6 5 4 3 2 1 0 Symbol TEMP RFU Default 00 00 00 00 Access RR RR RR RR Table 22. Temperature register bit description Bit Symbol Description 15 ACT Above Critical Trip. Increasing Tamb: 0 — Tamb <Tth(crit) 1 — Tamb ≥ Tth(crit) Decreasing Tamb: 0 — Tamb <Tth(crit) − Thys 1 — Tamb ≥ Tth(crit) − Thys 14 AAW Above Alarm Window. Increasing Tamb: 0 — Tamb ≤ Ttrip(u) 1 — Tamb >Ttrip(u) Decreasing Tamb: 0 — Tamb ≤ Ttrip(u) − Thys 1 — Tamb >Ttrip(u) − Thys 13 BAW Below Alarm Window. Increasing Tamb: 0 — Tamb ≥ Ttrip(l) 1 — Tamb <Ttrip(l) Decreasing Tamb: 0 — Tamb ≥ Ttrip(l) − Thys 1 — Tamb <Ttrip(l) − Thys 12 SIGN Sign bit. 0 — positive temperature value 1 — negative temperature value 11:1 TEMP Temperature Value (2’s complement). (LSB = 0.125 °C) 0 RFU reserved; always ‘0’ |
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