LPC2103 datasheet(25/37 Pages) NXP

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LPC2101_02_03_4

Product data sheet

Rev. 04 — 2 June 2009

25 of 37

NXP Semiconductors

LPC2101/02/03

Single-chip 16-bit/32-bit microcontrollers

[1]

Typical ratings are not guaranteed. The values listed are at room temperature (25

°C), nominal supply voltages.

[2]

Core and internal rail.

[3]

External rail.

[4]

If VDD(3V3) < 3.0 V, the I/O pins are not 5 V tolerant, and the ADC input voltage is limited to VDDA = 3.0 V.

[5]

If VDDA < 3.0 V, the I/O pins are not 5 V tolerant.

[6]

The RTC typically fails when Vi(VBAT) drops below 1.6 V.

[7]

Including voltage on outputs in 3-state mode.

[8]

VDD(3V3) supply voltages must be present.

[9]

3-state outputs go into 3-state mode when VDD(3V3) is grounded.

[10] Accounts for 100 mV voltage drop in all supply lines.

[11] Allowed as long as the current limit does not exceed the maximum current allowed by the device.

[12] Minimum condition for VI = 4.5 V, maximum condition for VI = 5.5 V. VDDA ≥ 3.0 V and VDD(3V3) ≥ 3.0 V.

[13] Applies to P0.25:16.

[14] Battery supply current on pin VBAT.

[15] Input leakage current to VSS.

[1]

Conditions: VSSA =0V, VDDA = 3.3 V and VDD(3V3) = 3.3 V for 10-bit resolution at full speed; VDDA = 2.6 V, VDD(3V3) = 2.6 V for 8-bit

resolution at full speed.

[2]

The ADC is monotonic, there are no missing codes.

[3]

The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 5.

[4]

The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after

appropriate adjustment of gain and offset errors. See Figure 5.

[5]

The offset error (EO) is the absolute difference between the straight line which ﬁts the actual curve and the straight line which ﬁts the

ideal curve. See Figure 5.

[6]

The gain error (EG) is the relative difference in percent between the straight line ﬁtting the actual transfer curve after removing offset

error, and the straight line which ﬁts the ideal transfer curve. See Figure 5.

[7]

The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC

and the ideal transfer curve. See Figure 5.

Vo(XTAL2)

output voltage on

pin XTAL2

1.8

Vi(RTCX1)

input voltage on pin

RTCX1

1.8

Vo(RTCX2) output voltage on

pin RTCX2

1.8

Table 5.

Static characteristics …continued

Tamb= −40 °C to +85 °C for commercial applications, unless otherwise speciﬁed.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

Table 6.

ADC static characteristics

VDDA = 2.5 V to 3.6 V; Tamb = −40 °C to +85 °C unless otherwise speciﬁed. ADC frequency 4.5 MHz.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIA

analog input voltage

VDDA

Cia

analog input capacitance

differential linearity error

[1][2][3] --

±1

LSB

EL(adj)

integral non-linearity

[1][4] --

±2

LSB

offset error

[1][5] --

±3

LSB

gain error

[1][6] --

±0.5

absolute error

[1][7] --

±4

LSB

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