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LTM4611

4611f

PLL, Frequency Adjustment and Synchronization

The default switching frequency of the LTM4611–with

PLLFLTR/fSET left floating–is 500kHz, nominally. The

PLLFLTR/fSET pin is driven to 1.23V through a high im-

pedance (>350kΩ) network. If desired, a resistor (RfSET)

can be connected from the PLLFLTR/fSET pin to INTVCC

to increase the switching frequency to as high as 780kHz,

nominally. Alternatively, RfSET can instead be connected

from PLLFLTR/fSET to signal ground (SGND) to decrease

theswitchingfrequencytoaslowastheminimumspecified

valueof330kHz,nominally.Inpracticalterms,however,be

advised that switching frequencies below 400kHz may be

of limited benefit due to the high inductor ripple currents

associated with that operating condition. See Figure 3.

There exists a fundamental trade-off between switch

mode DC/DC power conversion efficiency and switching

frequency: higher operating module switching frequency

enables the smallest overall solution size (minimized

output capacitance) for a given application; whereas,

lower switching frequency enables the highest efficiency

for a given application (to the extent that peak and RMS

inductor currents can be supported), but requires more

outputcapacitancetomaintaincomparableoutputvoltage

ripple and noise characteristics.

TheLTM4611canbesynchronizedfrom360kHzto710kHz

with an input clock that has a high level above 2V and a

low level below 0.6V. Again in practical terms, be advised

thatswitchingfrequenciesbelow400kHzmaybeoflimited

benefit due to the high inductor ripple currents associated

with that operating condition. See the Typical Applications

sectionforsynchronizationexamples.TheLTM4611mini-

mum on-time is limited to 90ns. Guardband the on-time

to 130ns. The on-time can be calculated as:

tON(MIN)=

FREQ

•

VOUT

VIN













Output Voltage Tracking and Soft-Start Functions

Output voltage tracking can be programmed externally

using the TRACK/SS pin. The output can be tracked up

and down with another regulator. The master regulator’s

output is divided down with an external resistor divider

that is the same as the slave regulator’s feedback divider

to implement coincident tracking. The LTM4611 uses an

accurate60.4kresistorinternallyforthetopfeedbackresis-

tor. Figure 4 shows an example of coincident tracking.

VOUT_SLAVE = 1+

60.4k

RFB2









• VTRACK

VTRACK is the track ramp applied to the slave’s track pin.

VTRACK has a control range of 0V to 0.8V, or the internal

reference voltage. When the master’s output is divided

down with the same resistor values used to set the slave’s

output, then the slave will coincident track with the master

until it reaches its final value. The master will continue

to its final value from the slave’s regulation point. Volt-

age tracking is disabled when VTRACK is more than 0.8V.

RTA in Figure 4 will be equal to the RFB2 for coincident

tracking.

The TRACK/SS pin of the master can be controlled by an

external ramp or the soft-start function of that regulator

canbeusedtodevelopthatmasterramp.TheLTM4611can

be used as a master by setting the ramp rate on its track

pin using a soft-start capacitor. A 1.4µA current source

is used to charge the soft-start capacitor. The following

equation can be used:

tSOFTSTART = 0.8V •

CSS

1.4µA









applicaTions inForMaTion

VALUE OF RESISTOR ON PLLFLTR/fSET PIN (M)

0.1

0.96

1.23

1.50

100

4611 F03

0.68

0.41

2.05

1.78

0.82

1.09

1.37

0.55

1.91

1.64

400

500

600

300

200

800

700

350

450

550

250

750

650

SWITCHING FREQUENCY

PLLFLTR/fSET VOLTAGE

RfSET CONNECTED

TO INTVCC

RfSET CONNECTED

TO GND

RfSET

NOT USED

Figure 3. Relationship Between Oscillator Frequency,

PLLFLTR/fSET Voltage, and External RISET Value and

Connection

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