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AM1705 Datasheet(PDF) 17 Page - Texas Instruments |
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AM1705 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 156 page ![]() AM1705 www.ti.com SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010 3.6.3 External Memory Interface A (ASYNC) Table 3-5. External Memory Interface A (EMIFA) Terminal Functions PIN NO SIGNAL NAME TYPE(1) PULL(2) MUXED DESCRIPTION PTP MMC/SD, GPIO, EMA_D[7]/MMCSD_DAT[7]/GP0[7]/BOOT[13] 54 I/O IPU BOOT EMA_D[6]/MMCSD_DAT[6]/GP0[6] 52 I/O IPU EMA_D[5]/MMCSD_DAT[5]/GP0[5] 51 I/O IPU EMA_D[4]/MMCSD_DAT[4]/GP0[4] 49 I/O IPU MMC/SD, GPIO EMIFA data bus EMA_D[3]/MMCSD_DAT[3]/GP0[3] 48 I/O IPU EMA_D[2]/MMCSD_DAT[2]/GP0[2] 46 I/O IPU EMA_D[1]/MMCSD_DAT[1]/GP0[1] 45 I/O IPU MMC/SD, GPIO, EMA_D[0]/MMCSD_DAT[0]/GP0[0]/BOOT[12] 44 I/O IPU BOOT EMA_A[12]/GP1[12] 42 O IPU EMA_A[11]/ GP1[11] 41 O IPU EMA_A[10]/GP1[10] 27 O IPU EMA_A[9]/GP1[9] 40 O IPU EMA_A[8]/GP1[8] 39 O IPU GPIO EMIFA address bus EMA_A[7]/GP1[7] 37 O IPD EMA_A[6]/GP1[6] 36 O IPD EMA_A[5]/GP1[5] 35 O IPD EMA_A[4]/GP1[4] 34 O IPD EMA_A[3]/GP1[3] 32 O IPD EMA_A[2]/MMCSD_CMD/GP1[2] 31 O IPU MMCSD, GPIO EMA_A[1]/MMCSD_CLK/GP1[1] 30 O IPU EMIFA address bus. EMA_A[0]/GP1[0] 29 O IPD GPIO EMA_BA[1]/GP1[13] 26 O IPU EMIFA bank address EMA_BA[0]/GP1[14] 25 O IPU GPIO EMA_CS[3] /GP2[6] 21 O IPU GPIO EMIFA Async Chip Select EMA_CS[2]/GP2[5]/BOOT[15] 23 O IPU GPIO, BOOT EMA_OE /AXR0[13]/GP2[7] 22 O IPU McASP0, GPIO EMIFA output enable. EMIFA wait EMA_WAIT[0]/ GP2[10] 19 I IPU GPIO input/interrupt. (1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal. Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the the signal name highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different types (ie., input versus output), the table reflects the pin function direction for that particular peripheral. (2) IPD = Internal Pulldown resistor, IPU = Internal Pullup resistor Copyright © 2010, Texas Instruments Incorporated Device Overview 17 Submit Documentation Feedback Product Folder Link(s): AM1705 |
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