AM1705 datasheet(33/156 Pages) TI

33 / 156 page

AM1705

www.ti.com

SPRS657A – FEBRUARY 2010 – REVISED APRIL 2010

5.2

Recommended Operating Conditions

MIN

NOM

MAX

UNIT

375 MHz version

1.14

1.2

1.32

Supply voltage, Core

CVDD

(CVDD, PLL0_VDDA )

456 MHz version

1.25

1.3

1.35

RVDD

Supply Voltage, Internal RAM

1.14

1.2

1.32

Supply voltage, I/O, 1.8V

1.71

1.8

1.89

(USB0_VDDA18, USB1_VDDA18)

DVDD

Supply voltage, I/O, 3.3V

3.15

3.3

3.45

(DVDD, USB0_VDDA33)

Supply ground

VSS

(VSS, PLL0_VSSA, OSCVSS(1))

High-level input voltage, I/O, 3.3V

VIH

(2)

High-level input voltage, OSCIN

0.7*CVDD

Low-level input voltage, I/O, 3.3V

0.8

VIL

(2)

Low-level input voltage, OSCIN

0.3*CVDD

VHYS

Input Hysteresis

160

USB

USB0_VBUS

4.75

5.25

Transition time, 10%-90%, All Inputs (unless otherwise specified in

0.25P (3)

the electrical data sections)

375 (1.2V)

Commercial (default)

MHz

456 (1.3V)

FSYSCLK6

ARM Operating Frequency (SYSCLK6)

375 (1.2V)

Industrial (D suffix)

MHz

456(1.3V)

Extended (A suffix)

375(1.2V)

MHz

(1)

When an external crystal is used, oscillator (OSC_VSS) ground must be kept separate from other grounds and connected directly to the

crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on the circuit

board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground.

(2)

These I/O specifications do not apply to USB I/Os. USB0 I/Os adhere to USB2.0 specification.

(3)

P = the period of the applied signal. Maintaining transition times as fast as possible is recommended to improve noise immunity on input

signals.

Device Operating Conditions

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