CDCE937

CDCEL937

SLAS564F – AUGUST 2007 – REVISED MARCH 2010

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SDA/SCL SERIAL INTERFACE

The CDCE937/CDCEL937 operates as a slave device of the 2-wire serial SDA/SCL bus, compatible with the

transfer (up to 400kbit/s) and supports 7-bit addressing.

The S1/SDA and S2/SCL pins of the CDC9xx are dual function pins. In the default configuration they are used as

SDA/SCL serial programming interface. They can be re-programmed as general purpose control pins, S1 and

S2, by changing the corresponding EEPROM setting, Byte 02, Bit [6].

DATA PROTOCOL

The device supports Byte Write and Byte Read and Block Write and Block Read operations.

For Byte Write/Read operations, the system controller can individually access addressed bytes.

For Block Write/Read operations, the bytes are accessed in sequential order from lowest to highest byte (with

most significant bit first) with the ability to stop after any complete byte has been transferred. The numbers of

Bytes read-out are defined by Byte Count in the Generic Configuration Register. At Block Read instruction all

bytes defined in the Byte Count has to be readout to correctly finish the read cycle.

Once a byte has been sent, it is written into the internal register and is effective immediately. This applies to

each transferred byte independent of whether this is a Byte Write or a Block Write sequence.

If the EEPROM Write Cycle is initiated, the internal SDA register contents are written into the EEPROM. During

this write cycle, data is not accepted at the SDA/SCL bus until the write cycle is completed. However, data can

be read during the programming sequence (Byte Read or Block Read). The programming status can be

monitored by reading EEPIP, Byte 01–Bit [6].

The offset of the indexed byte is encoded in the command code, as described in Table 5.

Table 5. Slave Receiver Address (7 Bits)

DEVICE

A6

A5

A4

A3

A2

R/W

CDCE913/CDCEL913

1

1

0

0

1

0

1

1/0

CDCE925/CDCEL925

1

1

0

0

1

0

0

1/0

CDCE937/CDCEL937

1

1

0

1

1

0

1

1/0

CDCE949/CDCEL949

1

1

0

1

1

0

0

1/0

(1)

Address bits A0 and A1 are programmable via the SDA/SCL bus (Byte 01, Bit [1:0]). This allows addressing up to 4 devices connected

to the same SDA/SCL bus. The least-significant bit of the address byte designates a write or read operation.

COMMAND CODE DEFINITION

Table 6. Command Code Definition

BIT

DESCRIPTION

0 = Block Read or Block Write operation

7

1 = Byte Read or Byte Write operation

(6:0)

Byte Offset for Byte Read, Block Read, Byte Write and Block Write operation.

12

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