TPS23754PWPR datasheet(21/41 Pages) TI

21 / 41 page

t-Time-200 s/div

I PI

16VInputstep

V RTN-VSS

V VDD-VSS

CIN completescharge

whileconverteroperates

RecoveryfromPIdropout

VRTN <12V@400 s

TPS23754

TPS23754-1

TPS23756

www.ti.com

SLVS885D – OCTOBER 2008 – REVISED DECEMBER 2009

PD Hotswap Operation

IEEE 802.3at has taken a new approach to PSE output limiting. A type 2 PSE must meet an output current vs.

time template with specified minimum and maximum sourcing boundaries. The peak output current may be as

high as 50 A for 10

μs or 1.75 A for 75 ms. This makes robust protection of the PD device even more important

than it was in IEEE 802.3-2008.

The internal hotswap MOSFET is protected against output faults and input voltage steps with a current limit and

deglitched (time-delay filtered) foldback. An overload on the pass MOSFET engages the current limit, with

VRTN-VVSS rising as a result. If VRTN rises above ~12 V for longer than ~400 μs, the current limit reverts to the

inrush value, and turns the converter off. The 400

μs deglitch feature prevents momentary transients from

causing a PD reset, provided that recovery lies within the bounds of the hotswap and PSE protection. Figure 26

shows an example of recovery from a 16 V PSE rising voltage step. The hotswap MOSFET goes into current

limit, overshooting to a relatively low current, recovers to ~950 mA full current limit, and charges the input

capacitor while the converter continues to run. The MOSFET did not go into foldback because VRTN-VVSS was

below 12 V after the 400

μs deglitch.

Figure 26. Response to PSE Step Voltage

The PD control has a thermal sensor that protects the internal hotswap MOSFET. Conditions like startup or

operation into a VDD to RTN short cause high power dissipation in the MOSFET. An over-temperature shutdown

(OTSD) turns off the hotswap MOSFET and class regulator, which are restarted after the device cools. The

hotswap MOSFET will be re-enabled with the inrush current limit when exiting from an over-temperature event.

Pulling DEN to VSS during powered operation causes the internal hotswap MOSFET to turn off. This feature

allows a PD with Option three ORing per Figure 27 to achieve adapter priority. Care must be taken with

synchronous converter topologies that can deliver power in both directions.

The hotswap switch will be forced off under the following conditions:

1. VAPD above VAPDEN (~1.5 V)

2. VDEN < VPD-DIS when VVDD– VVSS is in the operational range

3. PD over-temperature

4. (VVDD– VVSS) < PoE UVLO (~30.5 V).

Converter Controller Features

The TPS23754 dc/dc controller implements a typical current-mode control as shown in the Functional Block

Diagram. Features include oscillator, over-current and PWM comparators, current-sense blanker, dead-time

control, softstart, and gate driver. In addition, an internal slope-compensation ramp generator, frequency

synchronization logic, thermal shutdown, and startup current source with control are provided.

Submit Documentation Feedback

TPS23754PWPR Datasheet(PDF) 21 Page - Texas Instruments

TPS23754PWPR Datasheet(HTML) 21 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

Datasheet Download

Link URL