AD5757/AD5737

Preliminary Technical Data

Rev. PrD | Page 24 of 31

STATUS REGISTER

The Status Register is a read only register. This register contains any fault information as a well as a RAMP ACTIVE bit and a User Toggle

Bit. By setting the STATREAD bit in the Main Control Register, the Status Register contents can be readback on the SDO pin during every

write sequence.

Table 35. Decoding the Status Register

MSB

LSB

D15

to

D12

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

X

DC-

DC

D

DC-

DC

C

DC-

DC

B

DC-

DC

A

User

Toggle

Bit

PEC

ERROR

RAMP

ACTIVE

OVER

TEMP

X

X

X

X

OPEN

CCT

ID

OPEN

CCT

IC

OPEN

CCT

IB

OPEN

CCT

IA

Table 36. Status Register Options

Option

Description

DC-DCD

DC-DC Failure on Channel D. This fault indicates that the DCDC is not operating, for example if the boost inductor is

not connected.

DC-DCC

DC-DC Failure on Channel C. This fault indicates that the DCDC is not operating, for example if the boost inductor is

not connected.

DC-DCB

DC-DC Failure on Channel B. This fault indicates that the DCDC is not operating, for example if the boost inductor is

not connected.

DC-DC A

DC-DC Failure on Channel A. This fault indicates that the DCDC is not operating, for example if the boost inductor is

not connected.

User Toggle Bit

User Writable bit that the user can set and readback while doing a Status Register read. This can be used to verify

data communications if needed.

PEC ERROR

Denotes a PEC Error on the SPI Interface Transmit.

OVER TEMP

This bit will be set if the AD5757/AD5737 core temperature exceeds approx. 150°C.

RAMP ACTIVE

This bit will be set while any one of the output channels are slewing (slew rate control enabled on at least one

channel)

OPEN CCT ID

OPEN CCT IC

OPEN CCT IB

OPEN CCT IA