12 _____________________________________________________________________________________

20-Bit, Single-Channel, Ultra-Low-Power, Delta-

Sigma ADCs with Programmable Gain and GPIO

Figure 1. Normal-Mode Frequency Response (2.4576MHz Oscillator, LINEF = 0)

Figure 2. Normal-Mode Frequency Response (2.048MHz Oscillator, LINEF = 1)

Table 4a. Data Command to Select Channel AIN1 in Figure 3

Table 4b. Set All Channels High Impedance in Figure 3

NORMAL MODE REJECTION

DATA RATE 10.0sps

FREQUENCY (Hz)

90

80

60

40

70

30

50

20

10

-130

-140

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-150

0

100

NORMAL MODE REJECTION

DATA RATE 120.0sps

FREQUENCY (Hz)

1800

1600

1200

800

1400

600

1000

400

200

-130

-140

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-150

0

2000

NORMAL MODE REJECTION

DATA RATE 8.333sps

FREQUENCY (Hz)

90

80

60

40

70

30

50

20

10

-130

-140

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-150

0

100

NORMAL MODE REJECTION

DATA RATE 100.000sps

FREQUENCY (Hz)

1800

1600

1200

800

1400

600

1000

400

200

-130

-140

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

-20

-10

0

-150

0

2000

BIT

B7

B6

B5

B4

B3

B2

B1

B0

BIT NAME

DIR4

DIR3

DIR2

DIR1

DIO4

DIO3

DIO2

DIO1

VALUE

1

1

1

1

0

0

0

1

BIT

B7

B6

B5

B4

B3

B2

B1

B0

BIT NAME

DIR4

DIR3

DIR2

DIR1

DIO4

DIO3

DIO2

DIO1

VALUE

1

1

1

1

0

0

0

0