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41210 Datasheet(PDF) 27 Page - Intel Corporation |
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41210 Datasheet(HTML) 27 Page - Intel Corporation |
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27 / 52 page ![]() Datasheet — 41210 Bridge 27 2. This parameter is to be interpreted as the cumulative edge rate across the specified range rather than the instantaneous rate at any point within the transition range. For more details on slew rate measurement conditions please refer to the PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specification, Revision 2.0a. 3.3 Voltage Filter Specifications The 41210 Bridge requires voltage filtering to reduce noise on critical voltage planes. There are two filter types necessary on the platform: • Analog Voltage Filter (PCI-Express and PCI) • Bandgap Filter Note: For filter specifications, refer to the 41210 Serial to Parallel PCI Bridge Design Guide. 3.4 VCC15 and VCC33 Voltage Requirements The 41210 Bridge requires that the VCC33 voltage rail be equal to or no less than 0.5V below VCC15 (absolute voltage value) at all times during 41210 Bridge operation, including during system power up and power down. In other words, the following must always be true: VCC33 ≥ (VCC15 –0.5V) Figure 4 graphically illustrates this requirement. This can be accomplished by placing a diode (with a voltage drop < 0.5V) between VCC15 and VCC33. Anode will be connected to VCC15 and cathode will be connected to VCC33. Figure 4. Voltage Requirements VCC33 versus VCC15 |
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