41210 datasheet(28/52 Pages) INTEL

28 / 52 page

41210 Bridge — Datasheet

3.5

Timing Specifications

3.5.1

PCI Express Interface Timing

3.5.1.1

Differential Transmitter (TX) AC Output Specifications

Table 22 defines the AC specifications of parameters for the differential output at all transmitters

(TXs). The parameters are specified at the component pins.

1. No test load is necessarily associated with this value.

2. Specified at the measurement point into a timing and voltage compliance test load as shown in Figure 2,

“Compliance Test/Measurement Load” on page 23 and measured over any 250 consecutive TX UIs. (Also

refer to the Transmitter Compliance Eye Diagram as shown in Minimum Transmitter Timing and Voltage

Output Compliance Specification.)

3. A TTX-EYE = 0.70 UI provides for a total sum of deterministic and random jitter budget of TTX-JITTER-MAX =

0.30 UI for the transmitter collected over any 250 consecutive TX UIs. The TTX-EYE-MEDIAN-to-MAX-JITTER

specification ensures a jitter distribution in which the median and the maximum deviation from the median is

less than half of the total TX jitter budget collected over any 250 consecutive TX UIs. It should be noted that

the median is not the same as the mean. The jitter median describes the point in time where the number of

jitter points on either side is approximately equal as opposed to the averaged time value.

Table 22.

Differential Transmitter (TX) AC Output Specifications

Symbol

Parameter

Min

Nom

Max

Units

Comments

Unit Interval

399.88

400

400.12

Each UI is 400 ps +/-300 ppm. UI

does not account for SSC dictated

variations.

See Note 1.

TTX-EYE

Minimum TX Eye

Width

0.70

The maximum transmitter jitter

can be derived as TTX-MAX-JITTER

= 1 - TTX-EYE = .3 UI

See Notes 2 and 3.

TTX-EYE-

MEDIAN-to-

MAX-JITTER

Maximum time

between the jitter

median and

maximum deviation

for the median

0.15

Jitter is defined as the

measurement variation of the

crossing points (VTX-DIFFp-p = 0V)

in relation to an appropriate

average TX UI.

See Notes 2 and 3.

TTX-RISE,

TTX-FALL

D+/D- TX Output

Rise/Fall Time

0.125

See Notes 2 and 4.

TTX-IDLE-

MIN

Minimum time spent

in Electrical Idle

Minimum time a transmitter must

be in electrical idle.

TTX-IDLE-

SET-

TO-IDLE

Maximum time to

transition to a valid

Electrical Idle after

sending an Electrical

Idle ordered-set

After sending an electrical idle

ordered-set, the transmitter must

meet all electrical idle

specifications within this time.

TTX-IDLE-

RCV-

DETECT-

MAX

Maximum time spent

in Electrical Idle

before initiating a

receiver detect

sequence.

100

Maximum time spent in Electrical

Idle before initiating a receiver

detect sequence.

LTX-SKEW

Lane-to-Lane Output

Skew

500

Between any two Lanes within a

single Transmitter.

41210 Datasheet(PDF) 28 Page - Intel Corporation

41210 Datasheet(HTML) 28 Page - Intel Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL