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R28 Datasheet(PDF) 307 Page - Renesas Technology Corp |
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R28 Datasheet(HTML) 307 Page - Renesas Technology Corp |
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307 / 473 page  R8C/28 Group, R8C/29 Group 16. Clock Synchronous Serial Interface Rev.2.10 Sep 26, 2008 Page 288 of 441 REJ09B0279-0210 Figure 16.29 Registers SAR, ICDRT, ICDRR, and ICDRS Slave Address Register Symbol Address After Reset SAR 00BDh 00h Bit Symbol Bit Name Function RW b7 b6 b0 b1 b5 b3 b2 b4 RW Format select bit 0 : I2C bus format 1 : Clock synchronous serial format RW FS SVA2 SVA0 RW SVA3 SVA1 Slave address 6 to 0 Set an address different from that of the other slave devices w hich are connected to the I2C bus. When the 7 high-order bits of the first frame transmitted after the starting condition match bits SVA0 to SVA6 in slave mode of the I2C bus format, the MCU operates as a slave device. RW RW RW SVA6 SVA5 SVA4 RW RW IIC bus Transmit Data Register Symbol Address After Reset ICDRT 00BEh FFh RW b0 RW Function Store transmit data When it is detected that the ICDRS register is empty, the stored transmit data item is transferred to the ICDRS register and data transmission starts. When the next transmit data item is w ritten to the ICDRT register during transmission of the data in the ICDRS register, continuous transmit is enabled. When the MLS bit in the ICMR register is set to 1 (data transferred LSB-first) and after the data is w ritten to the ICDRT register, the MSB-LSB inverted data is read. b7 b6 b5 b4 b3 b2 b1 IIC bus Shift Register Symbol ICDRS RW b7 b6 b5 b4 b3 b2 b1 b0 This register is used to transmit and receive data. The transmit data is transferred from registers ICRDT to the ICDRS and data is transmitted from the SDA pin w hen transmitting. After 1 byte of data received, data is transferred from registers ICDRS to ICDRR w hile receiving. — Function IIC bus Receive Data Register Symbol Address After Reset ICDRR 00BFh FFh RW Store receive data When the ICDRS register receives 1 byte of data, the receive data is transferred to the ICDRR register and the next receive operation is enabled. RO Function b0 b7 b6 b5 b4 b3 b2 b1 |
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