IR3502MPBF datasheet(8/39 Pages) IRF

8 / 39 page

IR3502

Page 8 of 39

July 28, 2009

PIN DESCRIPTION

PIN#

PIN SYMBOL

PIN DESCRIPTION

1-8

VID7-0

Inputs to VID D to A Converter.

ENABLE

Enable input. A logic low applied to this pin puts the IC into fault mode. Do not float

this pin as the logic state will be undefined.

VRHOT

Open collector output of the VRHOT comparator which drives low if HOTSET pin

voltage is lower than 1.6V. Connect external pull-up.

HOTSET

A resistor divider including thermistor senses the temperature, which is used for

VRHOT comparator.

VOSEN-

Remote sense amplifier input. Connect to ground at the load.

VOSEN+

Remote sense amplifier input. Connect to output at the load.

Remote sense amplifier output. Used for OV detection

Inverting input to the Error Amplifier.

EAOUT

Output of the error amplifier.

VDRP

Buffered, scaled and thermally compensated IIN signal. Connect an external RC

network to FB to program converter output impedance.

Node for DCR thermal compensation network.

VDAC_BUFF

Buffered VDAC.

VSETPT

Error amplifier non-inverting input. Converter output voltage can be decreased from

the VDAC voltage with an external resistor connected between VDAC and this pin

(there is an internal sink current at this pin).

VDAC

Regulated voltage programmed by the VID inputs. Connect an external RC network

to LGND to program dynamic VID slew rate and provide compensation for the

internal buffer amplifier.

SS/DEL

Programs converter startup and over current protection delay timing. It is also used

to compensate the constant output current loop during soft start. Connect an

external capacitor to LGND to program.

ROSC/OVP

Connect a resistor to LGND to program oscillator frequency and VSETPT bias

current. Oscillator frequency equals switching frequency per phase. The pin voltage

is 0.6V during normal operation and higher than 1.6V if an over-voltage condition is

detected.

LGND

Local Ground for internal circuitry and IC substrate connection.

CLKOUT

Clock frequency is the switching frequency multiplied by phase number. Connect to

CLKIN pins of phase ICs.

PHSOUT

Phase clock output at switching frequency per phase. Connect to PHSIN pin of the

first phase IC.

PHSIN

Feedback input of phase clock. Connect to PHSOUT pin of the last phase IC.

VCCL

Voltage regulator and IC power input. Connect a decoupling capacitor to LGND.

IIN

Average current input from the phase IC(s). This pin is also used to communicate

over voltage condition to phase ICs.

VCCLDRV

Output of the VCCL regulator error amplifier to control external transistor. The pin

senses 12V power supply through a resistor.

VRRDY

Open collector output that drives low during startup and under any external fault

condition. Connect external pull-up.

IMON

Voltage at this pin is proportional to load current.

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