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FX579 Datasheet(PDF) 8 Page - CML Microcircuits |
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FX579 Datasheet(HTML) 8 Page - CML Microcircuits |
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8 / 23 page ![]() Half Duplex GMSK Modem FX579 © 1996 Consumer Microcircuits Limited 8 D/579/4 Note: (1) Device operation is not guaranteed for operation above 40kbits/sec or below 4kbits/sec. (2) If a suitable Xtal or clock signal is not supplied, device supply current may increase. Transmit Signal Path The binary data applied to the DATAIO input is retimed within the chip on each rising edge of the Tx clock and then converted into a 1V pk-pk binary signal centred around VBIAS. This signal is then connected to the input of the low pass Tx filter, and the output connected to the TXOP pin. The Tx filter has a low pass frequency response, which is approximately Gaussian in shape, as shown in Figure 4. This minimises amplitude and phase distortion of the binary signal while providing sufficient attenuation of the high frequency components, which would otherwise cause interference into adjacent radio channels. The actual filter bandwidth to be used in any particular application will be determined by the overall system requirements. The attenuation versus frequency response of the transmit filtering provided by this chip has been designed to meet the specifications for most GMSK modem systems, having a -3dB bandwidth switchable between 0.3 and 0.5 times the data bit rate. Note that an external RC network is required between the TXOP pin and the input to the frequency modulator. This network, which can form part of any dc level shifting and gain adjustment circuitry, forms an important part of the transmit signal filtering, and the ground connection to the capacitor should be positioned to give maximum attenuation of high frequency noise into the modulator. The component values should be chosen so that the product of the resistance (in Ohms) and the capacitance (in Farads) is: 0.34 / bit rate for BT of 0.3 0.21 / bit rate for BT of 0.5 (bit rate in bits per second) Suitable values for common bit rates are given in Table 2 Data Rate BT R2 C7 4800 bits/sec 0.5 91.0 k Ω 470pF 8000 bits/sec 0.3 91.0 k Ω 470pF 9600 bits/sec 0.5 47.0 k Ω 470pF 19 200 bits/sec 0.5 91.0 k Ω 120pF 32 000 bits/sec 0.3 47.0 k Ω 220pF 32 000 bits/sec 0.5 47.0 k Ω 150pF 38 400 bits/sec 0.3 47.0 k Ω 180pF 38 400 bits/sec 0.5 47.0 k Ω 120pF Table 2 Filter Bandwidth Selection The TXOP signal is centred around VBIAS, going positive for logic "1" level inputs to the DATAIO input and negative for logic "0" inputs. Note that when in receive mode the input of the internal buffer amplifier driving the TXOP pin is connected to VBIAS. Figure 5 shows typical transmit eye patterns (measured after the external RC network) for BT values of 0.3 and 0.5 Figure 6 shows the transmit output spectrum (measured after the external RC network) again for BT values of 0.3 and 0.5. |
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