Half Duplex GMSK Modem

FX579

© 1996 Consumer Microcircuits Limited

14

D/579/4

ACQUIRE Pin

Rx Level Measurement Mode

PLL Mode

"0" to "1"

Clamp

Narrow

"1"

Lossy Peak Detect

Wide Bandwidth

"0"

Peak Averaging

Narrow Bandwidth

Rx Level Measurement Clamp: Operates for a minimum of two bit times, maximum three bit

times, after a "0" to "1" transition of the ACQUIRE input. The external DOC capacitors are

rapidly charged towards the input signal level, with the charge time constant being of the order

of 0.5 bit time.

Rx Level Measurement Lossy Peak Detect: The detectors rapidly capture the +ve and -ve

going signal peaks of the Rx filter output signal, these peaks being stored on the external DOC

capacitors. The detectors operate in this mode whenever ACQUIRE is at a logic "1", except for

the initial Clamp period.

Rx Level Measurement Peak Averaging: Provides a slower but more accurate measurement

of the signal peak amplitudes. This operating mode depends on the PLL circuitry being in lock.

PLL Wide Bandwidth: Sets the PLL bandwidth wide enough to allow a lock to the received

signal in 8 zero crossings. This mode will operate as long as ACQUIRE is at logic "1".

PLL Narrow Bandwidth: The correction applied to the extracted clock is limited to a maximum

of ± 1/16th bit period for every 4 zero crossings received. The PLL operates in this mode

whenever the ACQUIRE input is set to logic "0".

Table 3 Receive Operating Modes

Rx Data Formats

The receive section of the FX579 works best with data which has a reasonably 'random' structure, i.e.

the data should contain approximately the same number of 'ones' as 'zeroes' with no long sequences

(> 100 bits) of consecutive 'ones' or 'zeroes'. Also, long sequences (>100 bits) of patterns without "11"

and "00" should be avoided.

For this reason, it is recommended that data is scrambled in some manner before transmission, for

example by 'exclusive-ORing' with the output of a binary pseudorandom pattern generator.

Where data is transmitted in bursts, each burst should be preceded by a preamble designed to allow

the receive modem to establish timing and level lock as quickly as possible. This preamble should be

at least 16 bits long, and should preferably consist of alternating pairs of "1"s and "0"s i.e.

"110011001100...."

A "10101010...." preamble sequence will yield poor peak levels for the receive

circuits, although performance is better with BT = 0.5 than with BT = 0.3.