Sensors

3

Freescale Semiconductor

MAG3110

1.3

Application Circuit

The device power is supplied through VDD line. Power supply decoupling capacitors (100 nF ceramic) should be placed as

near as possible to pins 1 and 2 of the device. VDDIO supplies power for the I/O pins SCL, SDA, and INT1.

The control signals SCL and SDA, are not tolerant of voltages more than VDDIO + 0.3 volts. If VDDIO is removed, the control

signals SCL and SDA will clamp any logic signals with their internal ESD protection diodes.

Figure 4. Electrical Connection

Table 1. Pin Description

Pin

Name

Function

1

Cap-A

Bypass Cap for Internal Regulator

2

VDD

Power Supply, 1.95V – 3.6V

3

NC

No Connect – do not connect

4

Cap-R

Cap for Reset Pulse

5

GND

GND

6

SDA

7

SCL

8

VDDIO

Power for I/O Buffers, 1.65V - VDD

9

INT1

Interrupt - Active High Output

10

GND

GND

SDA

VDDIO

1

2

3

4

5

10

9

8

7

6

MAG3110

(Top View)

100 nF

1

μF

VDD

100 nF

100 nF

SCL

INT1

4.7K

100 nF

4.7K