34704 datasheet(35/54 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34704

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

The 34704 assigns 1 bit for each regulator (TSDFx) to

indicate a fault due to thermal limit, where x corresponds to

each regulator from REG1 to REG8, except REG7

TSDF

bit

False

True

Regulator Fault Register

The 34704 assigns 1 bit for each regulator (FAULTx) to

indicate that a fault had occurred on each regulator. The

processor can just access this register periodically to

determine system status. This reduces the access cycles. If

a regulator fault register asserted, then the processor can

access that regulator’s registers to see what kind of fault had

occurred.

FAULT

bit

False

True

SPECIAL REGISTERS

REG3 Fine Voltage Scaling Register

Regulator 3 has an additional fine output voltage scaling

that enables to lower the output voltage in 0.5% steps. The

34704 assigns an 8-bit register (REG3DAC) to the REG3

Digital to analog converter for the FB3 voltage generation.

Output votlage must be reduced gradually to avoid a OV/UV

fault to occur.

REG7 Independent ON/OFF Control (Only on 34704A)

The 34704B provide two register to independently turn on

REG7 when REG6 is not needed. Care must be taken when

turning on REG7 to avoid inrush currents during regulator

ramp-up. Following Process must be followed to assure

successful turn on of REG7.

1. Set EN0 and clear DISCHR_B on REG7CR0 register

2. After 1ms or more, set EN1 on REG7CR0 register

3. Set REG7DAC register to $00

4. Gradually shift up REG7DAC register from $00 to $D9

to ramp-up the output voltage in a soft-start like wave.

Soft start timing is dependant of I2C communication

speed and number of bit you change per writing, for

instance use 4,8 or 16 bits increase to ramp up the

output voltage.

Code

$58

$50

$58

$D0

$59

$00

$59

$04

$59

$08

$59

$0C

...

$59

$D9

REG7 independent start up example

ADDR

R/W

Bit Name

Bits

Description

GENERAL1

$01

R/W

CCDSEQ

1:0

GrpC/E power sequence selection

SDDELAY

3:2

Hard shutdown delay timer selection

GENERAL2

$02

R/W

ONOFFx

3:0

GrpA,C,D,E On/off bits

ALLOFF

Soft shutdown bit (turn off all regulators)

GENERAL3

$03

SSTIME

1:0

Soft start configuration latch

R/W

COLDF

Cold power up detection flag

R/W

SHTD

Hard Shutdown detection flag

VGSET1

$04

R/W

OVUVSET1

Set REG1/VG response type to OV/UV

R/W

DVSSET1

4:1

REG1 DVS value setting

VGSET2

$05

DVSSTAT1

DVS voltage level status flag

5:1

REG1 fault flags: Thermal SD, SC, ILim, UV and OV

REG2SET1

$06

R/W

OVUVSET2

Set REG2 response type to OV/UV

R/W

DVSSET2

4:1

REG2 DVS value setting

34704 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc

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