ADC1413D datasheet(23/43 Pages) NXP

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ADC1413D_SER

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Product data sheet

Rev. 5 — 9 February 2011

23 of 43

NXP Semiconductors

ADC1413D series

Dual 14-bit ADC; serial JESD204A interface

11.5.2 ADC core output codes versus input voltage

Table 13 shows the data output codes for a given analog input voltage.

Fig 22. Detailed view of the JESD204A serializer with debug functionality

AND

SCR

PRBS

8-bit/

10-bit

8-bit/

10-bit

PRBS

'0'

'0/1'

PRBS

'0'

'0/1'

PRBS

N + CS

14 + 1

ADC A

PLL

AND

DLL

frame CLK

character CLK

bit CLK

SER

× 1

× F

× 10F

DUMMY

ADC_PD

ADC B

PRBS

FSM

(frame

assembly,

character

replication;

ILA,

test mode)

FRAME

ASSEMBLY

005aaa085

sync_request

14 + 1

ADC_MODE[1:0]

SCR_IN_MODE

LANE_MODE[1:0]

SWING_SEL[2:0]

LANE_POL

LANE_MODE[1:0]

LANE_POL

14 + 1

DUMMY

PRBS

ADC_MODE[1:0]

Table 13.

Output codes versus input voltage

INP

 INM (V) Offset binary

Two’s complement

OTR

< 1

00 0000 0000 0000

0 0000 0000 0000

1

00 0000 0000 0000

0 0000 0000 0000

0.9998779

00 0000 0000 0001

0 0000 0000 0001

0.9997559

00 0000 0000 0010

0 0000 0000 0010

0.9996338

00 0000 0000 0011

0 0000 0000 0011

0.9995117

00 0000 0000 0100

0 0000 0000 0100

....

0.0002441

01 1111 1111 1110

1 1111 1111 1110

0.0001221

01 1111 1111 1111

1 1111 1111 1111

10 0000 0000 0000

0 0000 0000 0000

0.0001221

10 0000 0000 0001

0 0000 0000 0001

0.0002441

10 0000 0000 0010

0 0000 0000 0010

....

0.9995117

11 1111 1111 1011

1 1111 1111 1011

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