ADC1413D datasheet(28/43 Pages) NXP

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ADC1413D_SER

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Product data sheet

Rev. 5 — 9 February 2011

28 of 43

NXP Semiconductors

ADC1413D series

Dual 14-bit ADC; serial JESD204A interface

11.6.3 Register description

11.6.3.1

ADC control registers

Table 18.

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 2

111111

not used

ADCB

R/W

ADC B gets the next SPI command:

ADC B not selected

ADC B selected

ADCA

R/W

ADC A gets the next SPI command:

0ADC A not selected

ADC A selected

Table 19.

Default values are highlighted.

Bit

Symbol

Access

Value

Description

SW_RST

R/W

reset digital part:

no reset

performs a reset of the digital part

6 to 2

00000

not used

1 to 0

PD[1:0]

R/W

Power-down mode:

normal (power-up)

full power-down

sleep

normal (power-up)

Table 20.

Default values are highlighted.

Bit

Symbol

Access

Value

Description

7 to 5

000

not used

SE_SEL

R/W

select SE clock input pin:

select CLKM input

select CLKP input

DIFF_SE

R/W

differential/single-ended clock input select:

fully differential

single-ended

not used

CLKDIV2_SEL

R/W

select clock input divider by 2:

disable

active

DCS_EN

R/W

duty cycle stabilizer enable:

disable

active

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