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ADC1413D Datasheet(PDF) 29 Page - NXP Semiconductors

Part # ADC1413D
Description  Dual 14-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps serial JESD204A interface
PDF  43 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

ADC1413D Datasheet(HTML) 29 Page - NXP Semiconductors

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ADC1413D_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 9 February 2011
29 of 43
NXP Semiconductors
ADC1413D series
Dual 14-bit ADC; serial JESD204A interface
Table 21.
Register Vref (address 0008h)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7 to 4
-
-
0000
not used
3
INTREF_EN
R/W
enable internal programmable VREF mode:
0
disable
1
active
2 to 0
INTREF[2:0]
R/W
programmable internal reference:
000
0 dB (FS=2 V)
001
1 dB (FS=1.78 V)
010
2 dB (FS=1.59 V)
011
3 dB (FS=1.42 V)
100
4 dB (FS=1.26 V)
101
5 dB (FS=1.12 V)
110
6 dB (FS=1 V)
111
not used
Table 22.
Digital Offset adjustment (address 0013h)
Default values are highlighted.
Register Offset
Decimal
DIG_OFFSET[5:0]
+31
011111
+31 LSB
...
...
...
0
000000
0
...
...
...
32
100000
32 LSB
Table 23.
Register Test pattern 1 (address 0014h)
Default values are highlighted.
Bit
Symbol
Access
Value
Description
7 to 3
-
-
00000
not used
2 to 0
TESTPAT_1[2:0]
R/W
digital test pattern:
000
off
001
mid-scale
010
 FS
011
+ FS
100
toggle ‘1111..1111’/’0000..0000’
101
custom test pattern, to be written in register 0015h and 0016h
110
‘010101...’
111
‘101010...’



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