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ADF7241 Datasheet(PDF) 24 Page - Analog Devices |
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ADF7241 Datasheet(HTML) 24 Page - Analog Devices |
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24 / 72 page ![]() ADF7241 Rev. 0 | Page 24 of 72 The ADF7241 incorporates a radio controller that manages the state of the IC in various operating modes and configurations. The host MCU can use single-byte commands to interface to the radio controller. The function of the radio controller includes the control of the sequence of powering up and powering down various blocks as well as system calibrations in different states of the device. Figure 30 shows the state diagram of the ADF7241 with possible transitions that are initiated by the host MCU and automatically by the radio controller. Device Initialization When the battery voltage is first applied to the ADF7241, a cold start-up sequence should be followed, as shown in Figure 31. The start-up sequence is as follows: • Apply the battery voltage, VDD_BAT, to the device with the desired voltage ramp rate. After a time, tRAMP, VDD_BAT reaches its final voltage value. • After tRAMP, execute the SPI command, RC_RESET. This command resets and shuts down the device. • After the specified time, t15, the host MCU can set the CS port of the SPI low. • Wait until the MISO output of the SPI (SPI_READY flag) goes high, at which time the device is in the idle state and ready to accept commands. A power-on reset takes place when the host MCU sets the CS port of the SPI low. All device LDOs are enabled together with the 26 MHz crystal oscillator and the digital core. After the radio controller initializes the configuration registers to their default values, the device enters the idle state. The cold start-up sequence is needed only when the battery voltage is first applied to the device. Afterwards, a warm start- up sequence can be used where the host MCU can wake up the device from a sleep state by setting the CS port of the SPI low. Idle State In this state, the receive and transmit blocks are powered down. The digital section is enabled and all configuration registers, as well as the packet RAM, are accessible. The host MCU must set any configuration parameters, such as modulation scheme, channel frequency, and WUC configuration, in this state. Bringing the CS input low in the sleep state causes a transition into the idle state. The transition from the sleep state to the idle state timing is shown in . The idle state can also be entered by issuing an RC_IDLE command in any state other than the sleep state. Figure 4 PHY_RDY State Upon entering the PHY_RDY state from the idle state, the RF frequency synthesizer is enabled and a system calibration is carried out. The receive and transmit blocks are not enabled in this state. The system calibration is omitted when the PHY_RDY state is entered from the RX, TX, or CCA state. The PHY_RDY state can be entered from the idle, RX, TX, or CCA state by issuing an RC_PHY_RDY command. RX State The RF frequency synthesizer is automatically calibrated to the programmed channel frequency upon entering the RX state from the PHY_RDY or TX state. The frequency synthesizer calibra- tion can be omitted for single-channel communication systems if short turnaround times are required. Following a programmable MAC delay period, the ADF7241 starts searching for a preamble and a synchronization word if enabled by the user. The RX state can be entered from the PHY_RDY, CCA, and TX states by issuing an RC_RX command. Depending on whether the device is configured to operate in packet or SPORT mode by setting Register buffercfg, Field rx_buffer_mode, the device can revert automatically to the PHY_RDY state when a packet is received, or remain in the RX state until a command to enter a different state is issued. Refer to the Receiver section for further details. CCA State Upon entering the CCA state, a clear channel assessment is performed. The CCA state can be entered from the PHY_RDY or RX state by issuing an RC_CCA command. By default, upon completion of the clear channel assessment, the ADF7241 automatically reverts to the state from which the RC_CCA command originated. TX State Upon entering the TX state, the RF frequency synthesizer is automatically calibrated to the programmed channel frequency. The frequency synthesizer calibration can be omitted for communication systems operating on a single channel if short turnaround times are required. Following a programmable delay period, the PA is ramped up and transmission is initiated. The TX state can be entered from the PHY_RDY or RX state by issuing the RC_TX command. Depending on whether the device is configured to operate in packet or SPORT mode by setting Register buffercfg, Field rx_buffer_mode, the device can revert automatically to the PHY_RDY state when a packet is transmitted, or remain in the TX state until a command to enter a different state is issued. Refer to the Transmitter section for further details. MEAS State The MEAS state is used to measure the chip temperature. The transmitter and receiver blocks are not enabled in this state. The chip temperature is measured using the ADC, which can be read from Register adc_rbk, Field adc_out, and is continuously updated with the chip temperature reading. This state is enabled by issuing the RC_MEAS command from the idle state and can be exited using the RC_IDLE command. |
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