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ADF7241 Datasheet(PDF) 32 Page - Analog Devices

Part # ADF7241
Description  Low Power IEEE 802.15.4 Zero-IF 2.4 GHz Transceiver IC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADF7241 Datasheet(HTML) 32 Page - Analog Devices

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ADF7241
Rev. 0 | Page 32 of 72
External PA Interface Modes
•
Mode 0 allows supply to an external circuit to be switched
on or off. This is useful for circuits that have no dedicated
power-down pin and/or have a high power-down current.
•
Mode 1 allows the supply to an external circuit to be switched
on or off. In addition, the PABIOP_ATB4 pin acts as a
programmable current source. A programmable voltage
can be generated if a suitable resistor is connected between
PABIAOP_ATB4 and GND.
•
Mode 2 allows the supply to an external PA circuit to be
switched on or off. In addition, the PABIOP_ATB4 pin acts
as a programmable current sink. A programmable voltage
can be generated if a suitable resistor is connected between
PABIAOP_ATB4 and VDD_BAT.
•
Mode 3 is the same as Mode 1, except that the switch
between PAVSUP_ATB3 and VDD_BAT is open.
•
Mode 4 is the same as Mode 2, except that the switch
between PAVSUP_ATB3 and VDD_BAT is open.
•
Mode 5 is intended for a PA circuit based on a single
external FET. The supply voltage to this FET is controlled
through the PAVSUP_ATB3 pin to ensure a low leakage
current in the power-down state. The bias servo loop
controls the gate bias voltage of the external FET such that
the current through the supply switch is equal to a
reference current. The reference current for the bias servo
loop is generated by the 5-bit reference DAC. In this mode,
the bias servo loop expects the current in the FET to increase
with increasing voltage at the PABIAOP_ATB4 output.
•
Mode 6 is the same as Mode 5, except that the bias servo
loop expects the current in the FET to increase with
decreasing voltage at the PABIAOP_ATB4 output.
LNA
PA
LNA
RFIO1P
RFIO1N
RFIO2N
RFIO2P
BALUN
BALUN
PAVSUP_ATB3
PABIAOP_ATB4
VDD_BAT
TXEN_GP5
ADF7241
GaAs
pHEMT FET
EXTERNAL PA
INTERFACE
CIRCUIT
Figure 39. Typical External PA Applications Circuit
Table 18. PA Interface
Register extpa_msc,
Field extpa_bias_mode
Register pd_aux,
Field extpa_bias_en1
VDD_BAT to PAVSUP_ATB3 Switch
Function of Pin PABIAOP_ATB4
X2
0
Open
Not used
0
1
Closed
Not used
1
1
Closed
Current source
2
1
Closed
Current sink
3
1
Open
Current source
4
1
Open
Current sink
5
1
Closed
Bias current servo output, positive polarity
6
1
Closed
Bias current servo output, negative polarity
7
1
Reserved
Reserved
1 Autoenabled when Register ext_ctrl, Field extpa_auto_en = 1.
2 X = don’t care.
&
3
5
PAVSUP_ATB3
PABIAOP_ATB4
ADF7241
DAC
REGISTER extpa_msc, FIELD extpa_bias_src
REGISTER extpa_cfg, FIELD extpa_bias
REGISTER extpa_msc, FIELD extpa_bias_mode
REGISTER pd_aux, FIELD extpa_bias_en
state == TX
REGISTER ext_ctrl, FIELD extpa_auto_en
CONTROL
LOGIC
SWITCH
VDD_BAT
Figure 40. Details of External PA Interface circuit



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