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ADF7241 Datasheet(PDF) 30 Page - Analog Devices |
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ADF7241 Datasheet(HTML) 30 Page - Analog Devices |
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30 / 72 page ![]() ADF7241 Rev. 0 | Page 30 of 72 RX TX PHY_RDY VALID IEEE802.15.4-2006 FRAME FRAME IN TX_BUFFER tx_mac_delay + mac_delay_ext RC_STATUS REGISTER irq_src0, FIELD rc_ready REGISTER irq_src1, FIELD rx_pkt_rcvd REGISTER irq_src1, FIELD tx_pkt_sent PACKET RECEIVED PACKET TRANSMITTED t27,t28 t26 Figure 37. IEEE 802.15.4 Auto RX-to-TX Turnaround Mode IEEE 802.15.4 AUTOMATIC RX-TO-TX TURNAROUND MODE The ADF7241 features an automatic RX-to-TX turnaround mode when it is operating in IEEE 802.15.4-2006 packet mode (Register rc_cfg, Field rc_mode = 0). The automatic RX-to-TX turnaround mode facilitates the timely transmission of acknowledgment frames. Figure 37 illustrates the timing of the automatic RX-to-TX turnaround mode. When enabled by setting Register buffercfg, Field auto_rx_to_tx_turnaround, the ADF7241 automatically enters the TX state following the reception of a valid IEEE 802.15.4-2006 frame. After the combined transmit MAC delay (tx_mac_delay + mac_delay_ext), the ADF7241 enters the TX state and transmits the frame stored in TX_BUFFER. After the transmission is complete, the ADF7241 enters the PHY_RDY state. There is a 38 μs delay between the reception of the last symbol and the generation of the rx_pkt_rcvd interrupt. The transmit MAC delay timeout period begins immediately after the reception of the last symbol. Therefore, the host MCU has up to t28 μs (see Table 12) after a frame has been received to cancel the transmit operation by means of issuing an RC_IDLE, RC_PHY_RDY, or RC_RX command. POWER AMPLIFIER The integrated power amplifier (PA) is connected to the RFIO2P and RFIO2N RF ports. It is equipped with a built-in harmonic filter to simplify the design of the external harmonic filter. The output power of the PA is set with Register extpa_msc, Field pa_pwr with an average step size of 2 dB. The step size increases at the lower end of the control range. Refer to Figure 26 for the typical variation of output power step size with the control word value. The PA also features a high power mode, which can be enabled by setting Register pa_bias, Field pa_bias_ctrl = 63 and Register pa_cfg, Field pa_bridge_dbias = 21. PA Ramping Controller The PA ramping controller of the ADF7241 minimizes spectral splatter generated by the transmitter. Upon entering the TX state, the ramping controller automatically ramps the output power of the PA from the minimum output power to the specified nominal value. In packet mode, transmission of the packet commences after the ramping phase. When the transmission of the packet is complete or the TX state is exited, the PA is turned off immedi- ately. It is also possible to allow the PA to ramp down its output power using the same ramp rate for the ramp-up phase, by setting Register ext_ctrl, Field pa_shutdown_mode to 1. Figure 38 illustrates the shape of the PA ramping profile and its timing. It follows a linear-in-dB shape. The ramp time depends on the output power setting in Register extpa_msc, Field pa_pwr and is specified with Register pa_rr, Field pa_ramp_rate according to the following equation: t_ramp = 2pa_rr.pa_ramp_rate × 2.4 ns × extpa_msc.pa_pwr External PA Interface The ADF7241 has an integrated biasing block for external PA circuits as shown in Figure 39. It is suitable for external PA circuits based on a single GaAs MOSFET and a wide range of integrated PA modules. The key components are shown in Figure 40. A switch between Pin VDD_BAT and Pin PAVSUP_ATB3 controls the supply current to the external FET. PABIOP_ATB4 can be used to set a bias point for the external FET. The bias point is controlled by a 5-bit DAC and/or a bias servo loop. To have the external PA interface under direct control of the host MCU, set Register ext_ctrl, Field extpa_auto_en = 0. The host MCU can then use Register pd_aux, Field extpa_bias_en to enable or disable the external PA. If Register ext_ctrl, Field extpa_auto_en = 1, the external PA automatically turns on when entering, and turns off when exiting the TX state. If this setting is used, the host MCU should not alter the configuration of Register pd_aux, Field extpa_bias_en. |
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