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33480 Datasheet(PDF) 29 Page - Freescale Semiconductor, Inc

Part # 33480
Description  Smart Front Corner Light
PDF  39 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33480 Datasheet(HTML) 29 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
29
33480
FUNCTIONAL DESCRIPTION
PROTECTION AND DIAGNOSIS FEATURES
The watchdog timeout is specified by tWDTO parameter. As
long as the WD bit (D10) of an incoming SPI message is
toggled within the minimum watchdog timeout period
(WDTO), the device will operate normally. If an internal
watchdog timeout occurs before the WD bit is toggled, the
device will revert to Fail mode. All registers are cleared. To
exit the Fail mode, send valid SPI communication with
WD bit = 1.
Table 9. Initialization Register
ADDRESS 00001—CONFIGURATION OL
The Configuration OL register is used to enable the open
load detection for LEDs in Normal Mode (OLLEDn in Table 8,
page 28). When bit D0 is set to logic [1], the open load
detection circuit for LED is activated for output 1. When bit D0
is set to logic [0], open load detection circuit for standard
bulbs is activated for output 1.
ADDRESS 00010
This register is not used.
ADDRESS 00011
This register is not used.
ADDRESS 01001—CONTROL OUT1
Bits D9 and D8 control the switching phases as shown in
Table 10.
Bit D7 at logic [1] turns ON OUT1. OUT1 is turned OFF
with bit D7 at logic [0]. This register allows the master to
control the duty cycle and the switching phases of OUT1. The
duty cycle resolution is given by bits D6:D0.
D7 = 0, D6:D0 = XX output OFF.
D7 = 1, D6:D0 = 00 output ON during 1/128.
D7 = 1, D6:D0 = 1A output ON during 27/128 on PWM
period.
D7 = 1, D6:D0 = 7F output continuous ON (no PWM).
ADDRESS 01010—CONTROL OUT2
Same description as OUT1.
ADDRESS 011111—CONTROL OUT3
Same description as OUT1.
ADDRESS 01100—CONTROL OUT4
Same description as OUT1.
ADDRESS 01101—CONTROL OUT5
Same description as OUT1.
SI Address
SI Data
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
WD
0
0
0
PWM
sync
Xenon MUX2
MUX1
MUX0
SOA1
SOA0
x = Don’t care
D6 (PWM sync) = 0, No synchronization
D6 (PWM sync) = 1, Synchronization on CSB positive edge
D5 (Xenon) = 0, Xenon
D5 (Xenon) = 1, H7 Bulb
D4, D3, D2 (MUX2, MUX1, MUX0) = 000, No current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 001, OUT1 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 010, OUT2 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 011, OUT3 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 100, OUT4 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 101, OUT5 current sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 110, External Switch current
sense
D4, D3, D2 (MUX2, MUX1, MUX0) = 111, No current sense
Table 10. Switching Phases
D9:D8
PWM Phase
00
01
90°
10
180°
11
270°



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