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33894 Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc

Part # 33894
Description  Quad High-Side Switch
PDF  28 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33894 Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
19
33894
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
SOLDERING INFORMATION
The 33894 is packaged in a surface mount power package
intended to be soldered directly on the printed circuit board.
The 33894 was qualified in accordance with JEDEC
standards JESD22-A113-B and J-STD-020A. The
recommended reflow conditions are as follows:
• Convection: 235°C +5.0/-0°C
• Vapor Phase Reflow (VPR): 235°C +5.0/-0°C
• Infrared (IR)/Convection: 235°C +5.0/-0°C
The maximum peak temperature during the soldering
process should not exceed 240°C. The time at maximum
temperature should range from 10 s to 40 s maximum.
LOGIC COMMANDS AND REGISTERS
Figure 9. Single 16-Bit Word SPI Communication
SERIAL INPUT COMMUNICATION
SPI communication is accomplished using 16-bit
messages. A message is transmitted by the MCU starting
with the MSB D15 and ending with the LSB, D0 (Table 7).
Each incoming command message on the SI pin can be
interpreted using the following bit assignments: the MSB,
D15, is the watchdog bit. In some cases, output selection is
done with bits D12:D11. The next three bits, D10:D8, are
used to select the command register. The remaining five bits,
D4:D0, are used to configure and control the outputs and
their protection features.
Multiple messages can be transmitted in succession to
accommodate those applications where daisy chaining is
desirable, or to confirm transmitted data, as long as the
messages are all multiples of 16 bits. Any attempt made to
latch in a message that is not 16 bits will be ignored.
The 33894 has defined registers, which are used to
configure the device and to control the state of the outputs.
Table 8, page 20, summarizes the SI registers.
CS
CSB
SI
SCLK
SO
D15
D1
D2
D3
D4
D5
D6
D7
D8
D9
D14
D13
D12
D11
D10
OD12
D0
OD13
OD14
OD15
OD6
OD7
OD8
OD9
OD10
OD11
OD1
OD2
OD3
OD4
OD5
1.
RSTB is in a logic H state during the above operation.
2.
DO, D1, D2, ... , and D15 relate to the most recent ordered entry of program data into the LUX IC
3.
OD0, OD1, OD2, ..., and OD15 relate to the first 16 bits of ordered fault and status data out of the LUX IC
NOTES:
OD0
CS
device.
device.
1. RST is a logic [1] state during the above operation.
2. D15:D0 relate to the most recent ordered entry of data into the device.
3. OD15:OD0 relate to the first 16 bits of ordered fault and status data out of the device.
Notes
Table 7. SI Message Bit Assignment
Bit Sig
SI Msg Bit
Message Bit Description
MSB
D15
Watchdog in: toggled to satisfy watchdog
requirements.
D14
:D15
Not used.
D12
:D11
Register address bits used in some cases
for output selection.
D10
:D8
Register address bits.
D7
:D5
Not used.
D4
:D1
Used to configure the inputs, outputs, and
the device protection features and SO
status content.
LSB
D0
Used to configure the inputs, outputs, and
the device protection features and SO
status content.



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