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LPC1763 Datasheet(PDF) 63 Page - NXP Semiconductors |
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LPC1763 Datasheet(HTML) 63 Page - NXP Semiconductors |
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63 / 79 page ![]() LPC1769_68_67_66_65_64_63 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 5 April 2011 63 of 79 NXP Semiconductors LPC1769/68/67/66/65/64/63 32-bit ARM Cortex-M3 microcontroller [1] The ADC is monotonic, there are no missing codes. [2] The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 26. [3] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 26. [4] The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the ideal curve. See Figure 26. [5] The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset error, and the straight line which fits the ideal transfer curve. See Figure 26. [6] The conversion frequency corresponds to the number of samples per second. Table 19. ADC characteristics (lower resolution) Tamb = −40 °C to +85 °C unless otherwise specified; 12-bit ADC used as 10-bit resolution ADC. Symbol Parameter Conditions Min Typ Max Unit ED differential linearity error [1][2] - ±1- LSB EL(adj) integral non-linearity [3] - ±1.5 - LSB EO offset error [4] - ±2- LSB EG gain error [5] - ±2- LSB fclk(ADC) ADC clock frequency 3.0 V ≤ V DDA ≤ 3.6 V - - 33 MHz 2.7 V ≤ V DDA < 3.0 V - - 25 MHz fc(ADC) ADC conversion frequency 3 V ≤ V DDA ≤ 3.6 V [6] -- 500 kHz 2.7 V ≤ V DDA < 3.0 V [6] -- 400 kHz |
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