LPC1763 datasheet(75/79 Pages) NXP

75 / 79 page

LPC1769_68_67_66_65_64_63

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Product data sheet

Rev. 7 — 5 April 2011

75 of 79

NXP Semiconductors

LPC1769/68/67/66/65/64/63

32-bit ARM Cortex-M3 microcontroller

17. Revision history

Table 25.

Revision history

Document ID

Release

date

Data sheet status

Change notice Supersedes

LPC1769_68_67_66_65_64_63 v.7 20110405

Product data sheet

LPC1769_68_67_66_65_64 v.6

Modifications:

• Pin description of pins P0[29] and P0[30] updated in Table note 5 of Table 4. Pins

are not 5 V tolerant.

• Typical value for Parameter Nendu added in Table 9.

• Parameter Vhys for I2C bus pins: typical value corrected Vhys = 0.05VDD(3V3) in

Table 7.

• Condition 3.0 V ≤ VDD(3V3) ≤ 3.6 V added in Table 16.

• Typical values for parameters IDD(REG)(3V3) and IBAT with condition Deep

power-down mode corrected in Table 7 and Table note 9, Table note 10, and

Table note 11 updated.

• For Deep power-down mode, Figure 9 updated and Figure 10 added.

LPC1769_68_67_66_65_64_63 v.6 20100825

Product data sheet

LPC1769_68_67_66_65_64 v.5

Modifications:

• Part LPC1768TFBGA added.

• Section 7.30.2; BOD level corrected.

• Added Section 10.2.

LPC1769_68_67_66_65_64_63 v.5 20100716

Product data sheet

LPC1769_68_67_66_65_64 v.4

20100201

Product data sheet

LPC1768_67_66_65_64 v.3

20091119

Product data sheet

LPC1768_66_65_64 v.2

20090211

Objective data sheet -

LPC1768_66_65_64 v.1

20090115

Objective data sheet -

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