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LPC1763 Datasheet(PDF) 9 Page - NXP Semiconductors

Part # LPC1763
Description  32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet
PDF  79 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC1763 Datasheet(HTML) 9 Page - NXP Semiconductors

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LPC1769_68_67_66_65_64_63
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 5 April 2011
9 of 79
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
81[1]
A8[1]
I/O
P0[4] — General purpose digital input/output pin.
I/O
I2SRX_CLK — Receive Clock. It is driven by the master and received
by the slave. Corresponds to the signal SCK in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
I
RD2 — CAN2 receiver input. (LPC1769/68/66/65/64 only).
I
CAP2[0] — Capture input for Timer 2, channel 0.
P0[5]/
I2SRX_WS/
TD2/CAP2[1]
80[1]
D7[1]
I/O
P0[5] — General purpose digital input/output pin.
I/O
I2SRX_WS — Receive Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
O
TD2 — CAN2 transmitter output. (LPC1769/68/66/65/64 only).
I
CAP2[1] — Capture input for Timer 2, channel 1.
P0[6]/
I2SRX_SDA/
SSEL1/MAT2[0]
79[1]
B8[1]
I/O
P0[6] — General purpose digital input/output pin.
I/O
I2SRX_SDA — Receive data. It is driven by the transmitter and read
by the receiver. Corresponds to the signal SD in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
I/O
SSEL1 — Slave Select for SSP1.
O
MAT2[0] — Match output for Timer 2, channel 0.
P0[7]/
I2STX_CLK/
SCK1/MAT2[1]
78[1]
A9[1]
I/O
P0[7] — General purpose digital input/output pin.
I/O
I2STX_CLK — Transmit Clock. It is driven by the master and received
by the slave. Corresponds to the signal SCK in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
I/O
SCK1 — Serial Clock for SSP1.
O
MAT2[1] — Match output for Timer 2, channel 1.
P0[8]/
I2STX_WS/
MISO1/MAT2[2]
77[1]
C8[1]
I/O
P0[8] — General purpose digital input/output pin.
I/O
I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
I/O
MISO1 — Master In Slave Out for SSP1.
O
MAT2[2] — Match output for Timer 2, channel 2.
P0[9]/
I2STX_SDA/
MOSI1/MAT2[3]
76[1]
A10[1]
I/O
P0[9] — General purpose digital input/output pin.
I/O
I2STX_SDA — Transmit data. It is driven by the transmitter and read
by the receiver. Corresponds to the signal SD in the I2S-bus
specification. (LPC1769/68/67/66/65/63 only).
I/O
MOSI1 — Master Out Slave In for SSP1.
O
MAT2[3] — Match output for Timer 2, channel 3.
P0[10]/TXD2/
SDA2/MAT3[0]
48[1]
H7[1]
I/O
P0[10] — General purpose digital input/output pin.
O
TXD2 — Transmitter output for UART2.
I/O
SDA2 — I2C2 data input/output (this is not an open-drain pin).
O
MAT3[0] — Match output for Timer 3, channel 0.
P0[11]/RXD2/
SCL2/MAT3[1]
49[1]
K9[1]
I/O
P0[11] — General purpose digital input/output pin.
I
RXD2 — Receiver input for UART2.
I/O
SCL2 — I2C2 clock input/output (this is not an open-drain pin).
O
MAT3[1] — Match output for Timer 3, channel 1.
Table 4.
Pin description …continued
Symbol
Pin
Ball
Type
Description



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